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Journal Articles
- 2024
[j2]Xinjian Liu
, Sumanth Kamineni, Jacob Breiholz, Benton H. Calhoun, Shuo Li:
A Sub-μW Energy-Performance-Aware IoT SoC With a Triple-Mode Power Management Unit for System Performance Scaling, Fast DVFS, and Energy Minimization. IEEE J. Solid State Circuits 59(7): 2272-2285 (2024)- 2019
- [j1]Ningxi Liu, Rishika Agarwala, Anjana Dissanayake, Daniel S. Truesdell, Sumanth Kamineni, Benton H. Calhoun:
A 2.5 ppm/°C 1.05-MHz Relaxation Oscillator With Dynamic Frequency-Error Compensation and Fast Start-Up Time. IEEE J. Solid State Circuits 54(7): 1952-1959 (2019)
Conference and Workshop Papers
- 2023
- [c8]Sumanth Kamineni, Arvind K. Sharma, Ramesh Harjani, Sachin S. Sapatnekar, Benton H. Calhoun:
AuxcellGen: A Framework for Autonomous Generation of Analog and Memory Unit Cells. DATE 2023: 1-6 - 2022
- [c7]Xinjian Liu, Sumanth Kamineni, Jacob Breiholz, Benton H. Calhoun, Shuo Li:
A 194nW Energy-Performance-Aware loT SoC Employing a 5.2nW 92.6% Peak Efficiency Power Management Unit for System Performance Scaling, Fast DVFS and Energy Minimization. ISSCC 2022: 1-3 - 2021
- [c6]Sumanth Kamineni, Shourya Gupta, Benton H. Calhoun:
MemGen: An Open-Source Framework for Autonomous Generation of Memory Macros. CICC 2021: 1-2 - 2020
- [c5]Shuo Li, Jacob Breiholz, Sumanth Kamineni, Jaeho Im, David D. Wentzloff, Benton H. Calhoun:
An 85 nW IoT Node-Controlling SoC for MELs Power-Mode Management and Phantom Energy Reduction. ISCAS 2020: 1-5 - [c4]Tutu Ajayi, Sumanth Kamineni, Morteza Fayazi, Yaswanth K. Cherivirala, Kyumin Kwon, Shourya Gupta, Wenbo Duan, Jeongsup Lee, Chien-Hen Chen, Mehdi Saligane, Dennis Sylvester, David T. Blaauw, Ronald Dreslinski Jr., Benton H. Calhoun, David D. Wentzloff:
Fully-Autonomous SoC Synthesis Using Customizable Cell-Based Analog and Mixed-Signal Circuits Generation. VLSI-SoC (Selected Papers) 2020: 65-85 - [c3]Tutu Ajayi, Sumanth Kamineni, Yaswanth K. Cherivirala, Morteza Fayazi, Kyumin Kwon, Mehdi Saligane, Shourya Gupta, Chien-Hen Chen, Dennis Sylvester, David T. Blaauw, Ronald G. Dreslinski, Benton H. Calhoun, David D. Wentzloff:
An Open-source Framework for Autonomous SoC Design with Analog Block Generation. VLSI-SOC 2020: 141-146 - 2018
- [c2]Ningxi Liu, Rishika Agarwala, Anjana Dissanayake, Daniel S. Truesdell, Sumanth Kamineni, Xing Chen, David D. Wentzloff, Benton H. Calhoun:
A 2.5 ppm/°C 1.05 MHz Relaxation Oscillator with Dynamic Frequency-Error Compensation and 8 µs Start-up Time. ESSCIRC 2018: 150-153 - [c1]Arijit Banerjee, Sumanth Kamineni, Benton H. Calhoun:
Multiple Combined Write-Read Peripheral Assists in 6T FinFET SRAMs for Low-VMIN IoT and Cognitive Applications. ISLPED 2018: 32:1-32:6
Coauthor Index
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