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Zhengkun Shen
Person information
- affiliation: Peking University, Beijing, China
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2020 – today
- 2023
- [c11]Dong Wang, Jiazheng Zhou, Hui Xu, Ningyuan Zhang, Xiaolei Su, Zhengkun Shen, Haoyun Jiang, Fan Yang, Yixiao Wang, Junhua Liu, Huailin Liao:
An All-Digital Outphasing Transmitter IC for Ka-Band Bit-to-RF Concurrent Multi-Beam DBF Array. VLSI Technology and Circuits 2023: 1-2 - 2022
- [j3]Zhengkun Shen
, Haoyun Jiang, Fan Yang, Yixiao Wang
, Zherui Zhang, Junhua Liu
, Huailin Liao
:
A 24 GHz Self-Calibrated All-Digital FMCW Synthesizer With 0.01% RMS Frequency Error Under 3.2 GHz Chirp Bandwidth and 320 MHz/µs Chirp Slope. IEEE J. Solid State Circuits 57(7): 2167-2180 (2022) - 2021
- [c10]Dong Wang, Zhengkun Shen, Xiaolei Su, Zexue Liu, Yi Tan, Chen Xu, Junhua Liu, Huailin Liao:
A Gm-Compensated 46-101 GHz Broadband Power Amplifier for High-Resolution FMCW Radars. ISCAS 2021: 1-5 - [c9]Chen Xu, Xiaolei Su, Zhengkun Shen, Dong Wang, Yi Tan, Zexue Liu, Hailong Jiao, Junhua Liu, Huailin Liao:
A Hybrid Digital Transmitter Architecture for High- Efficiency and High-Speed Applications. ISCAS 2021: 1-5 - [c8]Zhengkun Shen, Haoyun Jiang, Fan Yang, Yixiao Wang, Zherui Zhang, Junhua Liu, Huailin Liao:
32.5 A 24GHz Self-Calibrated ADPLL-Based FMCW Synthesizer with 0.01% rms Frequency Error Under 3.2GHz Chirp Bandwidth and 320MHz/μs Slope. ISSCC 2021: 450-452 - 2020
- [j2]Zhengkun Shen
, Haoyun Jiang, Heyi Li
, Zherui Zhang, Fan Yang, Junhua Liu
, Huailin Liao
:
A 12-GHz Calibration-Free All-Digital PLL for FMCW Signal Generation With 78 MHz/μs Chirp Slope and High Chirp Linearity. IEEE Trans. Circuits Syst. 67-I(12): 4445-4456 (2020) - [c7]Xiaolei Su, Xiucheng Hao, Dong Wang, Zhengkun Shen, Zexue Liu, Junhua Liu, Huailin Liao:
An 81-99 GHz Tripler with Fundamental Cancellation and 3rd Harmonic Enhancement Technique in 40-nm CMOS. ISCAS 2020: 1-5
2010 – 2019
- 2019
- [j1]Heyi Li
, Xiucheng Hao
, Zexue Liu
, Zherui Zhang, Zhengkun Shen, Junhua Liu, Huailin Liao:
A 2.9 GHz Variable Inductor-Based DCO With 1.3 kHz Frequency Resolution for FMCW Radar Applications. IEEE Trans. Circuits Syst. II Express Briefs 66-II(5): 813-817 (2019) - [c6]Zhengkun Shen, Heyi Li, Haoyun Jiang, Zherui Zhang, Junhua Liu, Huailin Liao:
A 12-GHz All-Digital Calibration-Free FMCW Signal Generator Based on a Retiming Fractional Frequency Divider. A-SSCC 2019: 287-290 - [c5]Haoyun Jiang, Zherui Zhang, Zhengkun Shen, Xiucheng Hao
, Zexue Liu, Heyi Li, Yi Tan, Qiang Zhou, Junhua Liu, Huailin Liao:
A Calibration-Free Fractional-N ADPLL using Retiming Architecture and a 9-bit 0.3ps-INL Phase Interpolator. ISCAS 2019: 1-5 - [c4]Zexue Liu, Zhengkun Shen, Yi Tan, Haoyun Jiang, Heyi Li, Junhua Liu, Huailin Liao:
A 0.5-V Ultra-Low-Power Low-Pass Filter with a Bulk-Feedback Technique. ISCAS 2019: 1-5 - [c3]Zhengkun Shen, Zexue Liu, Haoyun Jiang, Yi Tan, Heyi Li, Xiucheng Hao
, Junhua Liu, Huailin Liao:
A 28 GHz 8-Bit Calibration-Free LO-Path Phase Shifter using Transformer-Based Vector Summing Topology in 40 nm CMOS. ISCAS 2019: 1-5 - 2018
- [c2]Xiucheng Hao
, Hao Zhang, Zhengkun Shen, Zexue Liu, Luyao Zhang, Haoyun Jiang, Junhua Liu, Huailin Liao:
A 43.2 μW 2.4 GHz 64-QAM Pseudo-Backscatter Modulator Based on Integrated Directional Coupler. ISCAS 2018: 1-5 - [c1]Haoyun Jiang, Zexue Liu, Xiucheng Hao
, Zherui Zhang, Zhengkun Shen, Heyi Li, Junhua Liu, Huailin Liao:
A 12-bit 2.5 GHz 0.37ps-Peak-INL Digital-to-Time Converter with Parasitic-Insensitive Charge-Based Phase Interpolator. ISCAS 2018: 1-5
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