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Jiahao Lu 0002
Person information
- affiliation: Huazhong University of Science and Technology, School of Integrated Circuits, Wuhan, China
Other persons with the same name
- Jiahao Lu — disambiguation page
- Jiahao Lu 0001 — University of Science and Technology of China, Hefei, China, School of Information Science, Deep Space Exploration Lab, Hefei, China
- Jiahao Lu 0003 ![0009-0003-3790-6519 [0009-0003-3790-6519]](https://dblp.dagstuhl.de/img/orcid-mark.12x12.png) — Xiamen University, China — Xiamen University, China
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2020 – today
- 2025
 [j12]Tianze Huang [j12]Tianze Huang , Jiahao Lu , Jiahao Lu , Dongsheng Liu , Dongsheng Liu , Zhixiang Luo, Chi Cheng, Aobo Li , Zhixiang Luo, Chi Cheng, Aobo Li , Lei Chen , Lei Chen , Shuo Yang, Jiaming Zhang , Shuo Yang, Jiaming Zhang , Xiang Li: , Xiang Li:
 An Efficient and Reconfigurable Post-Quantum Crypto-Processor for SPHINCS+. IEEE Trans. Circuits Syst. I Regul. Pap. 72(5): 2252-2262 (2025)
- 2024
 [j11]Xiaoyu Shan [j11]Xiaoyu Shan , Dongsheng Liu , Dongsheng Liu , Ang Hu , Ang Hu , Zirui Jin , Zirui Jin , Jiahao Lu , Jiahao Lu , Aobo Li , Aobo Li , Kai Li , Kai Li , Xuecheng Zou , Xuecheng Zou : :
 A Low-Phase-Noise Wide-Tuning-Range Mode-Switching Oscillator Using Multi-Magnetic-Coupling and Active-Source-Degenerating Techniques. IEEE J. Solid State Circuits 59(9): 2774-2787 (2024)
 [j10]Xiaoyu Shan, Dongsheng Liu, Ang Hu [j10]Xiaoyu Shan, Dongsheng Liu, Ang Hu , Zirui Jin, Jiahao Lu, Hao Li, Jinsong Cui, Xuecheng Zou: , Zirui Jin, Jiahao Lu, Hao Li, Jinsong Cui, Xuecheng Zou:
 A 206.4 dBc/Hz FoMT Class-F23 VCO using nonlinear-capacitance-transforming technique. Microelectron. J. 149: 106221 (2024)
 [j9]Xiang Li [j9]Xiang Li , Jiahao Lu , Jiahao Lu , Dongsheng Liu , Dongsheng Liu , Aobo Li , Aobo Li , Shuo Yang, Tianze Huang: , Shuo Yang, Tianze Huang:
 A High Speed Post-Quantum Crypto-Processor for Crystals-Dilithium. IEEE Trans. Circuits Syst. II Express Briefs 71(1): 435-439 (2024)
 [j8]Jiaming Zhang [j8]Jiaming Zhang , Jiahao Lu , Jiahao Lu , Aobo Li , Aobo Li , Mingbo Wang, Xiang Li, Tianze Huang , Mingbo Wang, Xiang Li, Tianze Huang , Lei Chen, Dongsheng Liu , Lei Chen, Dongsheng Liu : :
 Super-K: A Superscalar CRYSTALS-KYBER Processor Based on Efficient Arithmetic Array. IEEE Trans. Circuits Syst. II Express Briefs 71(9): 4286-4290 (2024)
 [c12]Aobo Li [c12]Aobo Li , Jiahao Lu, Dongsheng Liu, Xiang Li: , Jiahao Lu, Dongsheng Liu, Xiang Li:
 A 40nm 1.26µ/Op Energy-Efficient CRYSTALS-KYBER Post-Quantum Crypto-Processor with Comprehensive Side Channel Security Analysis and Countermeasures. CICC 2024: 1-2
 [c11]Tianze Huang, Jiahao Lu, Dongsheng Liu, Aobo Li, Shuo Yang, Lei Chen, Xiang Li: [c11]Tianze Huang, Jiahao Lu, Dongsheng Liu, Aobo Li, Shuo Yang, Lei Chen, Xiang Li:
 A Timing Attack Resistant Lightweight Post-Quantum Crypto-Processor for SPHINCS+. ISCAS 2024: 1-5
 [c10]Siqi Xiong, Dongsheng Liu, Jiahao Lu, Aobo Li, Tianze Huang, Chenjun Yang, Ang Hu, Yuejun Zhang: [c10]Siqi Xiong, Dongsheng Liu, Jiahao Lu, Aobo Li, Tianze Huang, Chenjun Yang, Ang Hu, Yuejun Zhang:
 A Lightweight Folded Keccak-Based SHA-3 for Resource-Constrained Embedded Security. MCSoC 2024: 194-201
 [c9]Jiahao Lu, Jiaming Zhang, Zhixiang Luo, Aobo Li, Tianze Huang, Dongsheng Liu, Chi Cheng: [c9]Jiahao Lu, Jiaming Zhang, Zhixiang Luo, Aobo Li, Tianze Huang, Dongsheng Liu, Chi Cheng:
 An Efficient and Configurable Hardware Architecture of Polynomial Modular Operation for CRYSTALS-Kyber and Dilithium. MWSCAS 2024: 29-32
- 2023
 [j7]Aobo Li [j7]Aobo Li , Dongsheng Liu , Dongsheng Liu , Cong Zhang , Cong Zhang , Xiang Li, Shuo Yang, Xingjie Liu, Jiahao Lu , Xiang Li, Shuo Yang, Xingjie Liu, Jiahao Lu , Xuecheng Zou , Xuecheng Zou , Ang Hu , Ang Hu , Tianming Ni , Tianming Ni : :
 A Flexible and High-Performance Lattice-Based Post-Quantum Crypto Secure Coprocessor. IEEE Trans. Ind. Informatics 19(2): 1874-1883 (2023)
 [c8]Aobo Li [c8]Aobo Li , Jiahao Lu, Dongsheng Liu, Xiang Li, Shuo Yang, Tianze Huang, Jiaming Zhang, Siqi Xiong, Chenjun Yang: , Jiahao Lu, Dongsheng Liu, Xiang Li, Shuo Yang, Tianze Huang, Jiaming Zhang, Siqi Xiong, Chenjun Yang:
 A 40nm $\boldsymbol{2.76}\boldsymbol{\mu}\mathbf{J}/\mathbf{Op}$ Energy-Efficient Secure Post-Quantum Crypto-Processor for Crystals-Kyber on Module-LWE. A-SSCC 2023: 1-3
 [c7]Jiaming Zhang [c7]Jiaming Zhang , Jiahao Lu, Dongsheng Liu, Aobo Li, Xiang Li, Shuo Yang, Ang Hu, Xuecheng Zou: , Jiahao Lu, Dongsheng Liu, Aobo Li, Xiang Li, Shuo Yang, Ang Hu, Xuecheng Zou:
 Flexible and Efficient Implementation of CRYSTALS-KYBER SIMD RISC-V Coprocessor Based on Customized Vector Instruction-Set Extension. A-SSCC 2023: 1-3
 [c6]Aobo Li, Jiahao Lu, Dongsheng Liu, Xiang Li, Shuo Yang, Jiaming Zhang, Tianze Huang, Siqi Xiong: [c6]Aobo Li, Jiahao Lu, Dongsheng Liu, Xiang Li, Shuo Yang, Jiaming Zhang, Tianze Huang, Siqi Xiong:
 Hybrid Hardware-Software Architecture for Quantum Secure IoT Embedded Systems. MCSoC 2023: 1-8
 [c5]Aobo Li, Jiahao Lu, Dongsheng Liu, Ang Hu, Xiang Li, Shuo Yang, Tianze Huang: [c5]Aobo Li, Jiahao Lu, Dongsheng Liu, Ang Hu, Xiang Li, Shuo Yang, Tianze Huang:
 Multi-Probability Hash-based Random Number Generator for Post-Quantum Cryptography. MWSCAS 2023: 694-697
- 2022
 [j6]Xuan Cheng, Dongsheng Liu [j6]Xuan Cheng, Dongsheng Liu , Jiahao Lu, Lai Wei, Ang Hu, Jianming Lei, Zhige Zou, Xuecheng Zou, Quming Jiang: , Jiahao Lu, Lai Wei, Ang Hu, Jianming Lei, Zhige Zou, Xuecheng Zou, Quming Jiang:
 Efficient hardware design of a deep U-net model for pixel-level ECG classification in healthcare device. Microelectron. J. 126: 105492 (2022)
 [j5]Jie Gan, Xu Zhao [j5]Jie Gan, Xu Zhao , Jiajie Hu , Jiajie Hu , Yuanhui Yang, Linsong Zhu, Zonglin Li, Jiahao Lu, Dongsheng Liu , Yuanhui Yang, Linsong Zhu, Zonglin Li, Jiahao Lu, Dongsheng Liu : :
 A 325-μW step-16 digital-sensor based on dual-delay-chain in 180-nm CMOS. Microelectron. J. 128: 105570 (2022)
 [j4]Jiahao Lu [j4]Jiahao Lu , Dongsheng Liu , Dongsheng Liu , Xuan Cheng, Lai Wei, Ang Hu , Xuan Cheng, Lai Wei, Ang Hu , Xuecheng Zou: , Xuecheng Zou:
 An Efficient Unstructured Sparse Convolutional Neural Network Accelerator for Wearable ECG Classification Device. IEEE Trans. Circuits Syst. I Regul. Pap. 69(11): 4572-4582 (2022)
 [c4]Xiang Li, Dongsheng Liu, Ang Hu, Aobo Li, Shuo Yang, Jiahao Lu, Jianming Lei: [c4]Xiang Li, Dongsheng Liu, Ang Hu, Aobo Li, Shuo Yang, Jiahao Lu, Jianming Lei:
 A High Throughput and Configurable Pseudo-random Number Extension Generator for Lattice-based Post-quantum Cryptography. APCCAS 2022: 596-600
 [c3]Shuo Yang, Dongsheng Liu, Ang Hu, Aobo Li, Jiaming Zhang [c3]Shuo Yang, Dongsheng Liu, Ang Hu, Aobo Li, Jiaming Zhang , Xiang Li, Jiahao Lu, Changwen Mo: , Xiang Li, Jiahao Lu, Changwen Mo:
 An Instruction-configurable Post-quantum Cryptographic Processor towards NTRU. AsianHOST 2022: 1-6
- 2021
 [j3]Jiahao Lu [j3]Jiahao Lu , Dongsheng Liu , Dongsheng Liu , Zilong Liu, Xuan Cheng, Lai Wei, Cong Zhang , Zilong Liu, Xuan Cheng, Lai Wei, Cong Zhang , Xuecheng Zou, Bo Liu: , Xuecheng Zou, Bo Liu:
 Efficient Hardware Architecture of Convolutional Neural Network for ECG Classification in Wearable Healthcare Device. IEEE Trans. Circuits Syst. I Regul. Pap. 68(7): 2976-2985 (2021)
 [c2]Lingsong Zhu, Dongsheng Liu, Xiaohuan Li, Jiahao Lu, Lai Wei, Xuan Cheng: [c2]Lingsong Zhu, Dongsheng Liu, Xiaohuan Li, Jiahao Lu, Lai Wei, Xuan Cheng:
 An Efficient Hardware Architecture for Epileptic Seizure Detection using EEG Signals based on 1D-CNN. ASICON 2021: 1-4
- 2020
 [j2]Cong Zhang [j2]Cong Zhang , Zilong Liu, Yuyang Chen , Zilong Liu, Yuyang Chen , Jiahao Lu , Jiahao Lu , Dongsheng Liu , Dongsheng Liu : :
 A Flexible and Generic Gaussian Sampler With Power Side-Channel Countermeasures for Quantum-Secure Internet of Things. IEEE Internet Things J. 7(9): 8167-8177 (2020)
2010 – 2019
- 2019
 [j1]Jiahao Lu, Dongsheng Liu, Hao Li, Cong Zhang, Xuecheng Zou: [j1]Jiahao Lu, Dongsheng Liu, Hao Li, Cong Zhang, Xuecheng Zou:
 A Fully Integrated HF RFID Tag Chip With LFSR-based Light-weight Tripling Mutual Authentication Protocol. IEEE Access 7: 73285-73294 (2019)
 [c1]Jiahao Lu, Xianghua Luo, Dongsheng Liu, Peng Liu, Bo Liu: [c1]Jiahao Lu, Xianghua Luo, Dongsheng Liu, Peng Liu, Bo Liu:
 A Configurable Architecture of ANN in Hardware with Resource-Efficient Reusable Neuron. ASICON 2019: 1-4
Coauthor Index

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last updated on 2025-10-16 00:08 CEST by the dblp team
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