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2020 – today
- 2023
[c7]Y. L. Chou, W. J. Tsai, G. W. Wu, W. Chang, T. C. Lu, K. C. Chen, C. Y. Lu:
A Novel Data Recovery Technique for 3D TLC NAND Flash Memory Using Intercell Program. IRPS 2023: 1-4
2010 – 2019
- 2018
- [c6]T. W. Lin, S. H. Ku, C. H. Cheng, C. W. Lee, Ijen Huang, Wen-Jer Tsai, T. C. Lu, W. P. Lu, K. C. Chen, Tahui Wang, Chih-Yuan Lu:
Chip-level characterization and RTN-induced error mitigation beyond 20nm floating gate flash memory. IRPS 2018: 6-1 - [c5]Y. H. Liu, H. Y. Lin, C. M. Jiang, Tahui Wang, W. J. Tsai, T. C. Lu, K. C. Chen, Chih-Yuan Lu:
Investigation of data pattern effects on nitride charge lateral migration in a charge trap flash memory by using a random telegraph signal method. IRPS 2018: 6 - 2016
- [c4]Z. H. Che
, K. C. Chen, Y. L. Huang, Y. G. Liu, S. H. Yeh:
A Hybrid Methodology for Multi-Echelon Supply Chain Network Planning with Production Loss. IIAI-AAI 2016: 1005-1009 - 2012
- [c3]K. C. Chen:
Session MP4b: Machine-to-machine communications and networks (invited). ACSCC 2012: 579-580
2000 – 2009
- 2006
- [c2]Pablo Robelly, Hendrik Seidel, K. C. Chen, Gerhard P. Fettweis:
Energy efficiency vs. programmability trade-off: architectures and design principles. DATE 2006: 587-592 - 2001
- [j1]Wern-Ho Sheen, K. C. Chen, Fumiyuki Adachi:
Editorial. Wirel. Pers. Commun. 17(1): 1-2 (2001)
1980 – 1989
- 1989
- [c1]S. Muroga, X. Q. Xiang, J. Limqueco, L. P. Lin, K. C. Chen:
A logic network synthesis system, SYLON. ICCD 1989: 324-328
Coauthor Index
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