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ORCIDVijay Dhanasekaran
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2010 – 2019
- 2011
[j5]Vijay Dhanasekaran, Manisha Gambhir, Mohamed M. Elsayed, Edgar Sánchez-Sinencio, José Silva-Martínez, Chinmaya Mishra, Lei Chen, Erik Pankratz:
A Continuous Time Multi-Bit Delta Sigma ADC Using Time Domain Quantizer and Feedback Element. IEEE J. Solid State Circuits 46(3): 639-650 (2011)- [j4]Mohamed M. Elsayed, Vijay Dhanasekaran, Manisha Gambhir, José Silva-Martínez, Edgar Sánchez-Sinencio:
A 0.8 ps DNL Time-to-Digital Converter With 250 MHz Event Rate in 65 nm CMOS for Time-Mode-Based Sigma Delta Modulator. IEEE J. Solid State Circuits 46(9): 2084-2098 (2011)
2000 – 2009
- 2009
- [j3]Vijay Dhanasekaran, José Silva-Martínez, Edgar Sánchez-Sinencio:
Design of Three-Stage Class-AB 16ΩHeadphone Driver Capable of Handling Wide Range of Load Capacitance. IEEE J. Solid State Circuits 44(6): 1734-1744 (2009) - [c3]Vijay Dhanasekaran, Manisha Gambhir, Mohamed M. Elsayed, Edgar Sánchez-Sinencio, José Silva-Martínez, Chinmaya Mishra, Lei Chen, Erik Pankratz:
A 20MHz BW 68dB DR CT ΔΣ ADC based on a multi-bit time-domain quantizer and feedback element. ISSCC 2009: 174-175 - 2008
- [c2]Manisha Gambhir, Vijay Dhanasekaran, José Silva-Martínez, Edgar Sánchez-Sinencio:
A low power 1.3GHz dual-path current mode Gm-C filter. CICC 2008: 703-706 - [c1]Vijay Dhanasekaran, José Silva-Martínez, Edgar Sánchez-Sinencio:
A 1.2mW 1.6Vpp-Swing Class-AB 16Ω Headphone Driver Capable of Handling Load Capacitance up to 22nF. ISSCC 2008: 434-435 - 2007
- [j2]Vijay Dhanasekaran, Manisha Gambhir, José Silva-Martínez, Edgar Sánchez-Sinencio:
A 1.1 GHz Fifth Order Active-LC Butterworth Type Equalizing Filter. IEEE J. Solid State Circuits 42(11): 2411-2420 (2007) - [j1]Manisha Gambhir, Vijay Dhanasekaran, José Silva-Martínez, Edgar Sánchez-Sinencio:
Low-Power Architecture and Circuit Techniques for High-Boost Wide-Band Gm-C Filters. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(3): 458-468 (2007)
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