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Kyung Ki Kim
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2020 – today
- 2024
- [j14]Amrita Rana, Kyung Ki Kim:
Electrocardiography Classification with Leaky Integrate-and-Fire Neurons in an Artificial Neural Network-Inspired Spiking Neural Network Framework. Sensors 24(11): 3426 (2024) - [c52]Amrita Rana, Kyung Ki Kim:
NAS-OD: Neural Architecture Search for Object Detection. ICEIC 2024: 1-3 - 2023
- [c51]Akshay Kumar Sharma, Kyung Ki Kim:
Optimizing Image Classification with Inverse Depthwise Separable Convolution for Edge Devices. ISOCC 2023: 211-212 - [c50]Keerthana Pamidimukkala, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi:
Modeling Truncation-Based Approximation Error in Stochastic Computing Circuits. ISOCC 2023: 291-292 - [c49]Amrita Rana, Kyung Ki Kim:
Efficient Object Detection through Migration-Based Neural Architecture Search. ISOCC 2023: 329-330 - 2022
- [c48]Akshay Kumar Sharma, Kyung Ki Kim:
A Lightweight Detector for Small Objects. AICAS 2022: 360-361 - [c47]Amrita Rana, Kyung Ki Kim:
Search-Efficient NAS: Neural Architecture Search for Classification. ISOCC 2022: 261-262 - [c46]Keerthana Pamidimukkala, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi:
Time-Efficient Approximate Stochastic Computing for Medical Imaging Applications. ISOCC 2022: 314-315 - [c45]Yixuan He, Minsu Choi, Kyung Ki Kim, Yong-Bin Kim:
A Time-Domain Parallel Counter for Deep Learning Macro. ISOCC 2022: 346-347 - 2021
- [c44]Yixuan He, Minsu Choi, Kyung Ki Kim, Yong-Bin Kim:
A Time-Domain Computing-In-Memory Micro using Ring Oscillator. ISOCC 2021: 107-108 - [c43]Youngwook Lee, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi:
Stochastic Edge Detection for Fine-Grained Progressive Precision. ISOCC 2021: 119-120 - [c42]Cheolhyeong Park, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi:
FPGA-based Scalable Road Image Stochastic Denosing Approach. ISOCC 2021: 351-352 - [c41]Akshay Kumar Sharma, Byungho Kang, Kyung Ki Kim:
LightNet: A Lightweight Neural Network for Image Classification. ISOCC 2021: 419-420 - 2020
- [c40]Elizabeth Amyouny, Yixuan He, Kyung Ki Kim, Yong-Bin Kim:
Peak Current Control Boost Converter with Time-Multiplex. ISOCC 2020: 105-106 - [c39]Yixuan He, Minsu Choi, Kyung Ki Kim, Yong-Bin Kim:
An Ultra-Low-Power Tunable Bump Circuit using Source-Degenerated Differential Transconductor. ISOCC 2020: 131-132 - [c38]Prashanthi Metku, Minsu Choi, Kyung Ki Kim, Yong-Bin Kim:
Gate Diffusion Input Multi-Threshold Null Convention Logic Circuit Design Approach. ISOCC 2020: 282-283 - [c37]Amrita Rana, Kyung Ki Kim:
A Lightweight DNN for ECG Image Classification. ISOCC 2020: 328-329
2010 – 2019
- 2019
- [c36]Prashanthi Metku, Minsu Choi, Kyung Ki Kim, Yong-Bin Kim:
Optimization of Null Convenction Logic Using Gate Diffusion Input. ISOCC 2019: 21-22 - [c35]Prashanthi Metku, Minsu Choi, Kyung Ki Kim, Yong-Bin Kim:
Area Efficient Multi-Threshold Null Convenction Logic. ISOCC 2019: 27-28 - [c34]Yixuan He, Kyung Ki Kim, Yong-Bin Kim:
Evaluations of Electronic Neuron Model for Low Power VLSI Implementation. ISOCC 2019: 206-207 - [c33]Gyunam Jeon, Kyung Ki Kim, Yong-Bin Kim:
Standing Wave Oscillator Based Clock Distribution Minimizing Equivalent Capacitance for Process and Temperature variation. ISOCC 2019: 241-242 - [c32]Abdulsami Aldahlawi, Yang-Bin Kim, Kyung Ki Kim:
GPU Architecture Optimization For Mobile Computing. ISOCC 2019: 247-248 - [c31]Amrita Rana, Kyung Ki Kim:
ECG Heartbeat Classification Using a Single Layer LSTM Model. ISOCC 2019: 267-268 - 2018
- [c30]Keerthana Pamidimukkala, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi:
Generalized Adaptive Variable Bit Truncation Method for Approximate Stochastic Computing. ISOCC 2018: 218-219 - [c29]Prashanthi Metku, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi:
Low-Power Null Convention Logic Multiplier Design Based On Gate Diffusion Input Technique. ISOCC 2018: 233-234 - 2017
- [j13]HeungJun Jeon, Kyung Ki Kim, Yong-Bin Kim:
Fully Integrated on-Chip Switched DC-DC Converter for Battery-Powered Mixed-Signal SoCs. Symmetry 9(1): 18 (2017) - [c28]Prashanthi Metku, Ramu Seva, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi:
Low-power null convention logic design based on modified gate diffusion input technique. ISOCC 2017: 21-22 - [c27]Ramu Seva, Prashanthi Metku, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi:
Variable bit truncation technique for approximate stochastic computing (ASC). ISOCC 2017: 73-74 - [c26]Qilei Ren, Ka Lok Man, Eng Gee Lim
, Jinkyung Lee, Kyung Ki Kim:
Cooperation of multi robots for disaster rescue. ISOCC 2017: 133-134 - [c25]Vijayakumar Nanjappan, Hai-Ning Liang
, Kim Lau, Jaemin Choi, Kyung Ki Kim:
Clothing-based wearable sensors for unobtrusive interactions with mobile devices. ISOCC 2017: 139-140 - [c24]Yun Seok Hong, Yong-Bin Kim, Kyung Ki Kim:
Time-domain temperature sensor based on interlaced hysteresis delay cells. ISOCC 2017: 282-283 - [c23]Jin-Kyung Lee, Kyung Ki Kim:
Low power asynchronous circuit design methodology using a new Single Gate Sleep Convention Logic (SG-SCL). MWSCAS 2017: 317-320 - 2016
- [c22]Ramu Seva, Prashanthi Metku, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi:
Approximate stochastic computing (ASC) for image processing applications. ISOCC 2016: 31-32 - [c21]Prashanthi Metku, Ramu Seva, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi:
Hybrid GDI-NCL for area/power reduction. ISOCC 2016: 93-94 - [c20]Prashanthi Metku, Ramu Seva, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi:
Parallel decoding for multi-stage BCH decoder. ISOCC 2016: 107-108 - [c19]Yuechun Wang, Ka Lok Man, Robert G. Maunder
, Jin-Kyung Lee, Kyung Ki Kim:
A flexible software defined radio-based UHF RFID reader based on the USRP and LabView. ISOCC 2016: 217-218 - [c18]Chen Zhang, Gyunam Jeon, Yongsuk Choi, Yong-Bin Kim, Kyung Ki Kim:
An Area Efficient 4Gb/s Half-Rate 3-Tap DFE with Current-Integrating Summer for Data Correction. NATW 2016: 6-11 - 2014
- [c17]Ho Joon Lee, Yong-Bin Kim, Kyung Ki Kim:
Full custom implementation of a S-Box circuit architecture using power gated PLA structure. MWSCAS 2014: 294-297 - 2013
- [j12]Kyung Ki Kim:
Power switch implementation for low voltage digital circuits. IEICE Electron. Express 10(2): 20120757 (2013) - 2012
- [c16]Danny Hughes, Ka Lok Man, Zhun Shen, Kyung Ki Kim:
A loosely-coupled binding model for Wireless Sensor Networks. ISOCC 2012: 273-276 - [c15]Edward Collins, In-Seok Jung, Yong-Bin Kim, Kyung Ki Kim:
A design and integration of Parametric Measurement Unit on to a 600MHz DCL. ISOCC 2012: 435-438 - [c14]Moon Seok Kim, Yong-Bin Kim, Kyung Ki Kim:
All-digital phased-locked loop with local passive interpolation time-to-digital converter based on a tristate inverter. MWSCAS 2012: 326-329 - [c13]Siva Pavan Kumar Kotipalli, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi:
Design and evaluation of Side Channel Attack resistant asynchronous AES Round Function. MWSCAS 2012: 410-413 - [c12]Ho Joon Lee, Yong-Bin Kim, Kyung Ki Kim:
On-chip HBD sensor for nanoscale CMOS technology. MWSCAS 2012: 434-437 - [c11]HeungJun Jeon, Yong-Bin Kim, Kyung Ki Kim:
A novel 4-to-3 step-down on-chip SC DC-DC converter with reduced bottom-plate loss. MWSCAS 2012: 1060-1063 - 2011
- [j11]Haiqing Nan, Kyung Ki Kim, Wei Wang, Ken Choi:
Dynamic Voltage and Frequency Scaling for Power- Constrained Design using Process Voltage and Temperature Sensor Circuits. J. Inf. Process. Syst. 7(1): 93-102 (2011) - [c10]Jeong-Tak Ryu
, Kyung Ki Kim:
Adaptive Power Management for Nanoscale SoC Design. FGIT-FGCN (2) 2011: 437-446 - [c9]Ho Joon Lee, Kyung Ki Kim:
Analysis of time dependent dielectric breakdown in nanoscale CMOS circuits. ISOCC 2011: 440-443 - [c8]Edward Collins, In-Seok Jung, Yong-Bin Kim, Kyung Ki Kim:
A design approach of a Parametric Measurement Unit on to a 600MHz DCL. ISOCC 2011: 446-449 - 2010
- [j10]Kyung Ki Kim, Wei Wang, Ken Choi:
On-Chip Aging Sensor Circuits for Reliable Nanometer MOSFET Digital Circuits. IEEE Trans. Circuits Syst. II Express Briefs 57-II(10): 798-802 (2010) - [c7]Kyung Ki Kim, Haiqing Nan, Ken Choi:
Power gating for ultra-low voltage nanometer ICs. ISCAS 2010: 1472-1475 - [c6]Kyung Ki Kim, Haiqing Nan, Ken Choi:
Adaptive HCI-aware power gating structure. ISQED 2010: 219-224 - [c5]Kyung Ki Kim, Haiqing Nan, Ken Choi:
Hybrid MOSFET/CNFET based power gating structure. SoCC 2010: 334-338
2000 – 2009
- 2009
- [j9]Kyung Ki Kim, Haiqing Nan, Ken Choi:
Ultralow-Voltage Power Gating Structure Using Low Threshold Voltage. IEEE Trans. Circuits Syst. II Express Briefs 56-II(12): 926-930 (2009) - [j8]Kyung Ki Kim, Yong-Bin Kim, Fabrizio Lombardi:
A Novel Statistical Timing and Leakage Power Characterization of Partially Depleted Silicon-on-Insulator Gates. IEEE Trans. Instrum. Meas. 58(2): 401-410 (2009) - [j7]Kyung Ki Kim, Yong-Bin Kim:
A Novel Adaptive Design Methodology for Minimum Leakage Power Considering PVT Variations on Nanoscale VLSI Systems. IEEE Trans. Very Large Scale Integr. Syst. 17(4): 517-528 (2009) - 2008
- [j6]Kyung Ki Kim, Yong-Bin Kim:
Standby power reduction using optimal supply voltage and body-bias voltage. IEICE Electron. Express 5(15): 556-561 (2008) - [j5]Kyung Ki Kim, Jing Huang, Yong-Bin Kim, Fabrizio Lombardi:
Analysis and Simulation of Jitter Sequences for Testing Serial Data Channels. IEEE Trans. Ind. Informatics 4(2): 134-143 (2008) - 2007
- [j4]Kyung Ki Kim, Yong-Bin Kim, Minsu Choi, Nohpill Park:
Leakage Minimization Technique for Nanoscale CMOS VLSI. IEEE Des. Test Comput. 24(4): 322-330 (2007) - [j3]Kyung Ki Kim:
Modeling and analysis of inter-symbol interference (ISI) jitter. IEICE Electron. Express 4(19): 582-587 (2007) - [j2]Kyung Ki Kim, Yong-Bin Kim:
Ultra-low voltage high-speed Schmitt trigger circuit in SOI MOSFET technology. IEICE Electron. Express 4(19): 606-611 (2007) - [j1]Young-Jun Lee, Jihyun Lee, Kyung Ki Kim, Yong-Bin Kim, Joseph Ayers
:
Low power CMOS electronic central pattern generator design for a biomimetic underwater robot. Neurocomputing 71(1-3): 284-296 (2007) - [c4]Yong-Bin Kim, Kyung Ki Kim, James T. Doyle:
A CMOS Low Power Fully Digital Adaptive Power Delivery System Based on Finite State Machine Control. ISCAS 2007: 1149-1152 - [c3]Kyung Ki Kim, Yong-Bin Kim:
Optimal Body Biasing for Minimum Leakage Power in Standby Mode. ISCAS 2007: 1161-1164 - 2005
- [c2]Kyung Ki Kim, Jing Huang, Yong-Bin Kim, Fabrizio Lombardi:
On the Modeling and Analysis of Jitter in ATE Using Matlab. DFT 2005: 285-293 - [c1]Kyung Ki Kim, Yong-Bin Kim, Fabrizio Lombardi:
Data Dependent Jitter (DDJ) Characterization Methodology. DFT 2005: 294-304
Coauthor Index
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last updated on 2024-07-15 20:13 CEST by the dblp team
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