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Prassanna Sithambaram
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2010 – 2019
- 2010
- [j5]Ashutosh Chakraborty, Karthik Duraisami, Prassanna Sithambaram, Alberto Macii, Enrico Macii, Massimo Poncino:
Thermal-Aware Clock Tree Design to Increase Timing Reliability of Embedded SoCs. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(10): 2741-2752 (2010)
2000 – 2009
- 2009
- [j4]Prassanna Sithambaram, Alberto Macii, Enrico Macii:
Enhanced switching activity balancing encoding schemes for uniform temperature distribution in on-chip buses. J. Embed. Comput. 3(3): 155-165 (2009) - 2008
- [j3]Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Alberto Macii, Enrico Macii, Massimo Poncino:
Implementation of a thermal management unit for canceling temperature-dependent clock skew variations. Integr. 41(1): 2-8 (2008) - [j2]Andrea Calimera, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, R. Iris Bahar, Alberto Macii, Enrico Macii, Massimo Poncino:
Thermal-Aware Design Techniques for Nanometer CMOS Circuits. J. Low Power Electron. 4(3): 374-384 (2008) - [j1]Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino:
Dynamic Thermal Clock Skew Compensation Using Tunable Delay Buffers. IEEE Trans. Very Large Scale Integr. Syst. 16(6): 639-649 (2008) - 2007
- [c8]Karthik Duraisami, Prassanna Sithambaram, Ashoka Visweswara Sathanur, Alberto Macii, Enrico Macii, Massimo Poncino:
Design Exploration of a Thermal Management Unit for Dynamic Control of Temperature-Induced Clock Skew. ISCAS 2007: 1061-1064 - [c7]Prassanna Sithambaram, Alberto Macii, Enrico Macii:
New Adaptive Encoding Schemes for Switching Activity Balancing in On-Chip Buses. PATMOS 2007: 232-241 - 2006
- [c6]Ashutosh Chakraborty, Prassanna Sithambaram, Karthik Duraisami, Alberto Macii, Enrico Macii, Massimo Poncino:
Thermal resilient bounded-skew clock tree optimization methodology. DATE 2006: 832-837 - [c5]Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Alberto Macii, Enrico Macii, Massimo Poncino:
Implications of ultra low-voltage devices on design techniques for controlling leakage in NanoCMOS circuits. ISCAS 2006 - [c4]Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino:
Dynamic thermal clock skew compensation using tunable delay buffers. ISLPED 2006: 162-167 - [c3]Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Alberto Macii, Enrico Macii, Massimo Poncino:
Dynamic Management of Thermally-Induced Clock Skew: An Implementation Perspective. PATMOS 2006: 214-224 - 2005
- [c2]Prassanna Sithambaram, Alberto Macii, Enrico Macii:
Exploring the impact of architectural parameters on energy efficiency of application-specific block-enabled SRAMs. ACM Great Lakes Symposium on VLSI 2005: 377-380 - [c1]Prassanna Sithambaram, Alberto Macii, Enrico Macii:
Design and Implementation of a Memory Generator for Low-Energy Application-Specific Block-Enabled SRAMs. PATMOS 2005: 477-487
Coauthor Index
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