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ORCIDSriram Govindarajan
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2000 – 2009
- 2001
[j2]Naren Narasimhan, Elena Teica, Rajesh Radhakrishnan, Sriram Govindarajan, Ranga Vemuri
:
Theorem Proving Guided Development of Formal Assertions in a Resource-Constrained Scheduler for High-Level Synthesis. Formal Methods Syst. Des. 19(3): 237-273 (2001)- [j1]V. Srinivasan, Sriram Govindarajan, Ranga Vemuri:
Fine-grained and coarse-grained behavioral partitioning with effective utilization of memory and design space exploration for multi-FPGA architectures. IEEE Trans. Very Large Scale Integr. Syst. 9(1): 140-158 (2001) - [c12]Sujatha Sundararaman, Sriram Govindarajan, Ranga Vemuri:
Application Specific Macro Based Synthesis. VLSI Design 2001: 317- - 2000
- [c11]Sriram Govindarajan, Ranga Vemuri:
Improving the Schedule Quality of Static-List Time-Constrained Scheduling. DATE 2000: 749 - [c10]Sriram Govindarajan, Ranga Vemuri:
Tightly Integrated Design Space Exploration with Spatial and Temporal Partitioning in SPARCS. FPL 2000: 7-18 - [c9]Preetham Lakshmikanthan, Sriram Govindarajan, Vinoo Srinivasan, Ranga Vemuri:
Behavioral Partitioning with Synthesis for Multi-FPGA Architectures under Interconnect, Area, and Latency Constraints. IPDPS Workshops 2000: 924-931 - [c8]Sriram Govindarajan, Vinoo Srinivasan, Preetham Lakshmikanthan, Ranga Vemuri:
A Technique for Dynamic High-Level Exploration During Behavioral-Partitioning for Multi-Device Architectures. VLSI Design 2000: 212-219
1990 – 1999
- 1999
- [c7]Meenakshi Kaul, Ranga Vemuri, Sriram Govindarajan, Iyad Ouaiss:
An Automated Temporal Partitioning and Loop Fission Approach for FPGA Based Reconfigurable Synthesis of DSP Applications. DAC 1999: 616-622 - 1998
- [c6]Sriram Govindarajan, Iyad Ouaiss, Meenakshi Kaul, Vinoo Srinivasan, Ranga Vemuri:
An Effective Design System for Dynamically Reconfigurable Architectures. FCCM 1998: 312-313 - [c5]Naren Narasimhan, Elena Teica, Rajesh Radhakrishnan, Sriram Govindarajan, Ranga Vemuri:
Theorem proving guided development of formal assertions in a resource-constrained scheduler for high-level synthesis. ICCD 1998: 392-399 - [c4]Iyad Ouaiss, Sriram Govindarajan, Vinoo Srinivasan, Meenakshi Kaul, Ranga Vemuri:
An Integrated Partitioning and Synthesis System for Dynamically Reconfigurable Multi-FPGA Architectures. IPPS/SPDP Workshops 1998: 31-36 - 1997
- [c3]Sriram Govindarajan, Ranga Vemuri:
Cone-based clustering heuristic for list-scheduling algorithms. ED&TC 1997: 456-462 - [c2]Sriram Govindarajan, Ranga Vemuri:
Dynamic Bounding of Successor Force Computations in the Force Directed List Scheduling Algorithms. ICCD 1997: 752-757 - 1996
- [c1]Naren Narasimhan, Vinoo Srinivasan, Madhavi Vootukuru, Jeffrey Walrath, Sriram Govindarajan, Ranga Vemuri:
Rapid Prototyping of Reconfigurable Coprocessors. ASAP 1996: 303-312
Coauthor Index
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