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2020 – today
- 2024
[j22]Cheng-Yan Siao, Rong-Guey Chang, Han-Chun Huang:
Robotic Arms for Telemedicine System Using Smart Sensors and Ultrasound Robots. Internet Things 27: 101243 (2024)- [j21]Van-Tam Hoang, Yared Abera Ergu, Van-Linh Nguyen, Rong-Guey Chang:
Security risks and countermeasures of adversarial attacks on AI-driven applications in 6G networks: A survey. J. Netw. Comput. Appl. 232: 104031 (2024) - 2023
- [j20]Rong-Guey Chang, Tam-Van Hoang:
Constructing an AI Compiler for ARM Cortex-M Devices. Comput. Syst. Sci. Eng. 46(1): 999-1019 (2023) - 2022
- [j19]Jhe-Wei Lin
, Rong-Guey Chang:
Chinese story generation of sentence format control based on multi-channel word embedding and novel data format. Soft Comput. 26(5): 2179-2196 (2022) - [j18]Jhe-Wei Lin, Tran Duy Thanh, Rong-Guey Chang:
Multi-channel word embeddings for sentiment analysis. Soft Comput. 26(22): 12703-12715 (2022) - 2020
- [c22]Jhe-Wei Lin, Jo-Han Tseng, Rong-Guey Chang:
Chinese Story Generation Using Conditional Generative Adversarial Network. ICAIIC 2020: 457-462
2010 – 2019
- 2019
- [c21]Jhe-Wei Lin, Yu-Che Gao, Rong-Guey Chang:
Chinese Story Generation with FastText Transformer Network. ICAIIC 2019: 395-398 - 2016
- [j17]Ting-Hsuan Chien, Rong-Guey Chang:
A thermal-aware scheduling for multicore architectures. J. Syst. Archit. 62: 54-62 (2016) - 2015
- [j16]Jen-Chieh Chang, Chia-Jung Chen, Rong-Guey Chang:
A virtualization approach to develop middleware for ubiquitous high performance computing. Comput. Electr. Eng. 48: 44-59 (2015) - [j15]Chia-Jung Chen, Rong-Guey Chang:
Thermal-aware code transformation across functional units. Concurr. Comput. Pract. Exp. 27(3): 594-609 (2015) - [j14]Chia-Jung Chen, Rong-Guey Chang:
A virtualisation simulation environment for data centre. Int. J. Simul. Process. Model. 10(4): 350-359 (2015) - [j13]Chia-Jung Chen, Rong-Guey Chang:
A priority scheduling for TM pathologies. J. Supercomput. 71(3): 1095-1115 (2015) - [c20]Jen-Chieh Chang, Ting-Hsuan Chien, Rong-Guey Chang:
A Cyber Physical System with GPU for CNC Applications. ICA3PP (3) 2015: 203-212 - 2014
- [j12]Cheng-Yu Lee, Min-Chin Hung, Rong-Guey Chang:
Instruction scheduling and transformation for a VLIW unified reduced instruction set computer/digital signal processor processor with shared register architecture. Concurr. Comput. Pract. Exp. 26(1): 134-151 (2014) - [j11]Cheng-Yu Lee, Tzong-Yen Lin, Rong-Guey Chang:
Power-aware code scheduling assisted with power gating and DVS. Future Gener. Comput. Syst. 34: 66-75 (2014) - [c19]Ting-Hsuan Chien, Rong-Guey Chang:
Dynamic Voltage and Frequency Scaling Optimization for Multicore Architectures. ICS 2014: 298-307 - [c18]Ting-Hsuan Chien, Chia-Jung Chen, Rong-Guey Chang:
An Adaptive Zero-Copy Strategy for Ubiquitous High Performance Computing. EuroMPI/ASIA 2014: 139 - 2013
- [j10]Mark Po-Hung Lin, Yi-Ting He, Vincent Wei-Hao Hsiao, Rong-Guey Chang, Shuenn-Yuh Lee:
Common-Centroid Capacitor Layout Generation Considering Device Matching and Parasitic Minimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(7): 991-1002 (2013) - [c17]Cheng-Yu Lee, Shuang-Jhu Yang, Rong-Guey Chang:
Thermal-Aware Scheduling Collaborating with OS and Architecture. ICPP 2013: 1044-1051 - 2012
- [j9]Chih-Yuan Chen, Jhong-Yi Ciou, Rong-Guey Chang:
Multi-level simultaneous multithreading scheduling to reduce the temperature of register files. Concurr. Comput. Pract. Exp. 24(12): 1296-1316 (2012) - [c16]Cheng-Yu Lee, Jen-Chieh Chang, Rong-Guey Chang:
Compiler Optimization to Reduce Cache Power with Victim Cache. UIC/ATC 2012: 841-844 - [c15]Chia-Jung Chen, Yi-Sheng Liu, Rong-Guey Chang:
DCSim: Design Analysis on Virtualization Data Center. UIC/ATC 2012: 900-905 - 2011
- [j8]Shuenn-Yuh Lee, Chih-Yuan Chen, Jia-Hua Hong, Rong-Guey Chang, Mark Po-Hung Lin:
Automated synthesis of discrete-time sigma-delta modulators from system architecture to circuit netlist. Microelectron. J. 42(2): 347-357 (2011) - [c14]Chia-Jung Chen, Rong-Guey Chang:
Thermal-Aware Code Transformation across Functional Units. EUC 2011: 300-305 - [c13]Chia-Jung Chen, Rong-Guey Chang, Chih-wen Hsueh:
Wireless Smooth Data Streaming on Application Layer. EUC 2011: 384-389 - [c12]Tzong-Yen Lin, Cheng-Yu Lee, Chia-Jung Chen, Rong-Guey Chang:
Compiler Support for Concurrency Synchronization. ICA3PP (1) 2011: 93-105 - [c11]Yuan-Cheng Lee, Chih-wen Hsueh, Rong-Guey Chang:
Inline Emulation for Paravirtualization Environment on Embedded Systems. RTCSA (1) 2011: 388-392 - [r1]Jenq Kuen Lee, Rong-Guey Chang, Chi-Bang Kuan:
Array Languages, Compiler Techniques for. Encyclopedia of Parallel Computing 2011: 75-87 - 2010
- [j7]Rong-Guey Chang, Chih-Yuan Chen, Jia-Hua Hong, Shuenn-Yuh Lee:
Wide dynamic-range sigma-delta modulator with adaptive feed-forward coefficients. IET Circuits Devices Syst. 4(2): 99-112 (2010) - [j6]Yuan-Shin Hwang, Tzong-Yen Lin, Rong-Guey Chang:
DisIRer: Converting a retargetable compiler into a multiplatform binary translator. ACM Trans. Archit. Code Optim. 7(4): 18:1-18:36 (2010) - [c10]Huang-Jia Cheng, Yuan-Shin Hwang, Rong-Guey Chang, Cheng-Wei Chen:
Trading Conditional Execution for More Registers on ARM Processors. EUC 2010: 53-59
2000 – 2009
- 2009
- [j5]Kuan-Wei Cheng, Tzong-Yen Lin, Rong-Guey Chang:
Profile-based dynamic pipeline scaling. J. Supercomput. 48(2): 210-226 (2009) - [c9]Tang-Hsun Tu, Chih-wen Hsueh, Rong-Guey Chang:
A Portable and Efficient User Dispatching Mechanism for Multicore Systems. RTCSA 2009: 427-436 - 2007
- [j4]Shao-Yang Wang, Rong-Guey Chang:
Code size reduction by compressing repeated instruction sequences. J. Supercomput. 40(3): 319-331 (2007) - [c8]Kuan-Wei Cheng, Tzong-Yen Lin, Rong-Guey Chang:
Compiler Support for Dynamic Pipeline Scaling. EUC 2007: 64-74 - 2006
- [c7]Tzong-Yen Lin, Rong-Guey Chang:
Power-Aware Instruction Scheduling. EUC 2006: 35-44 - [c6]Shao-Yang Wang, Chih-Yuan Chen, Rong-Guey Chang:
Optimizing Code Size for Embedded Real-Time Applications. EUC 2006: 297-307 - 2005
- [c5]Chih-wen Hsueh, Tien-Fu Chen, Rong-Guey Chang, Shi-Wu Lo:
Development of Architecture and Software Technologies in High-Performance Low-Power SoC Design. RTCSA 2005: 475-480 - 2004
- [j3]Rong-Guey Chang, Tyng-Ruey Chuang, Jenq Kuen Lee:
Support and optimization for parallel sparse programs with array intrinsics of Fortran 90. Parallel Comput. 30(4): 527-550 (2004) - 2001
- [j2]Rong-Guey Chang, Tyng-Ruey Chuang, Jenq Kuen Lee:
Parallel Sparse Supports for Array Intrinsic Functions of Fortran 90. J. Supercomput. 18(3): 305-339 (2001) - [c4]Rong-Guey Chang, Jia-Shin Li, Jenq Kuen Lee, Tyng-Ruey Chuang:
Probabilistic Inference Schemes for Sparsity Structures of Fortran 90 Array Intrinsics. ICPP 2001: 61-68
1990 – 1999
- 1999
- [c3]Rong-Guey Chang, Tyng-Ruey Chuang, Jenq Kuen Lee:
Compiler Optimizations for Parallel Sparse Programs with Array Intrinsics of Fortran 90. ICPP 1999: 103-111 - 1998
- [c2]Rong-Guey Chang, Tyng-Ruey Chuang, Jenq Kuen Lee:
Efficient Support of Parallel Sparse Computation for Array Intrinsic Functions of Fortran 90. International Conference on Supercomputing 1998: 45-52 - 1997
- [j1]Rong-Guey Chang, Cheng-Wei Chen, Tyng-Ruey Chuang, Jenq Kuen Lee:
Towards Automatic Support of Parallel Sparse Computation in Java with Continuous Compilation. Concurr. Pract. Exp. 9(11): 1101-1111 (1997) - [c1]Tyng-Ruey Chuang, Rong-Guey Chang, Jenq Kuen Lee:
Sampling and Analytical Techniques for Data Distribution of Parallel Sparse Computation. PP 1997
Coauthor Index
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