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Kyung-Wook Shin
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2020 – today
- 2025
- [c5]Su-Hyeon Lee, Song-Hee Lee, Kyung-Wook Shin:
A Hardware Accelerator for High-Speed Computation of Ed25519 and X25519. ICEIC 2025: 1-3 - [c4]Ju-Hyung Lee, Kyung-Wook Shin:
A High-Performance Point Scalar Multiplier supporting Edwards25519 and Curve25519 Curves. ICEIC 2025: 1-3 - 2021
- [c3]Hyeon-Jun Yang, Kyung-Wook Shin:
A Hardware Implementation of Point Scalar Multiplication on Edwards25519 Curve. ICEIC 2021: 1-3
2010 – 2019
- 2019
- [c2]Dong-Seong Kim, Sang-Hyun Lee, Kyung-Wook Shin:
A Hardware Implementation of SHA3 Hash Processor using Cortex-M0. ICEIC 2019: 1-4
1990 – 1999
- 1998
- [j2]Kyung-Wook Shin, Bang-Sup Song, Kantilal Bacrania:
A 200-MHz complex number multiplier using redundant binary arithmetic. IEEE J. Solid State Circuits 33(6): 904-909 (1998) - 1994
- [c1]Kyung-Wook Shin, Heung-Woo Jeon, Yong-Seum Kang:
An Efficient VLSI Implementation of Vector-Radix 2-D DCT using Mesh-Connected 2-D Array. ISCAS 1994: 47-50 - 1991
- [j1]Moon-Key Lee, Kyung-Wook Shin, Jang-Kyu Lee:
A VLSI array processor for 16-point FFT. IEEE J. Solid State Circuits 26(9): 1286-1292 (1991)
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last updated on 2025-03-10 20:53 CET by the dblp team
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