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Jinli Rao
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2010 – 2019
- 2019
- [j4]Jinli Rao, Tianyong Ao, Kui Dai, Xuecheng Zou:
ARCE: Towards Code Pointer Integrity on Embedded Processors Using Architecture-Assisted Run-Time Metadata Management. IEEE Comput. Archit. Lett. 18(2): 115-118 (2019) - 2018
- [j3]Jinli Rao, Tianyong Ao, Shu Xu, Kui Dai, Xuecheng Zou:
Design Exploration of SHA-3 ASIP for IoT on a 32-bit RISC-V Processor. IEICE Trans. Inf. Syst. 101-D(11): 2698-2705 (2018) - 2016
- [j2]Jinli Rao, Zhangqing He, Shu Xu, Kui Dai, Xuecheng Zou:
BFWindow: Speculatively Checking Data Property Consistency against Buffer Overflow Attacks. IEICE Trans. Inf. Syst. 99-D(8): 2002-2009 (2016) - 2014
- [c3]Tianyong Ao, Zhangqing He, Jinli Rao, Kui Dai, Xuecheng Zou:
A Compact Hardware Implementation of SM3 Hash Function. TrustCom 2014: 846-850 - 2011
- [j1]Dan Wu, Xuecheng Zou, Kui Dai, Jinli Rao, Pan Chen, Zhaoxia Zheng:
Implementation and evaluation of parallel FFT on Engineering and Scientific Computation Accelerator (ESCA) architecture. J. Zhejiang Univ. Sci. C 12(12): 976-989 (2011) - 2010
- [c2]Pan Chen, Kui Dai, Dan Wu, Jinli Rao, Xuecheng Zou:
The parallel algorithm implementation of matrix multiplication based on ESCA. APCCAS 2010: 1091-1094 - [c1]Dan Wu, Kui Dai, Xuecheng Zou, Jinli Rao, Pan Chen:
A High Efficient On-Chip Interconnection Network in SIMD CMPs. ICA3PP (1) 2010: 149-162
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