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ORCIDRami Beidas
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2020 – today
- 2024
[c11]Rami Beidas, Jason Helge Anderson:
Mapping Enumeration for Multi-Context CGRAs Using Zero-Suppressed Binary Decision Diagrams. FCCM 2024: 151-161- [c10]Omar Ragheb, Stephen Wicklund, Matthew Walker, Rami Beidas, Adham Ragab, Tianyi Yu, Jason Helge Anderson:
CGRA-ME 2.0: A Research Framework for Next-Generation CGRA Architectures and CAD. IPDPS (Workshops) 2024: 642-649 - 2023
- [c9]Omar Ragheb, Rami Beidas, Jason Helge Anderson:
Statically Scheduled vs. Elastic CGRA Architectures: Impact on Mapping Feasibility. IPDPS Workshops 2023: 468-475 - 2022
- [c8]Rami Beidas, Jason Helge Anderson:
CGRA Mapping Using Zero-Suppressed Binary Decision Diagrams. ASP-DAC 2022: 616-622 - [c7]Omar Ragheb, Tianyi Yu, Rami Beidas, Jason Helge Anderson:
Elastic Multi-Context CGRAs. IPDPS Workshops 2022: 655-662 - 2021
- [c6]Jason Helge Anderson, Rami Beidas, Vimal Chacko, Hsuan Hsiao, Xiaoyi Ling, Omar Ragheb, Xinyuan Wang, Tianyi Yu:
CGRA-ME: An Open-Source Framework for CGRA Architecture and CAD Research : (Invited Paper). ASAP 2021: 156-162
2010 – 2019
- 2011
- [c5]Rami Beidas, Wai Sum Mong, Jianwen Zhu:
Register pressure aware scheduling for high level synthesis. ASP-DAC 2011: 461-466 - 2010
- [c4]Alexander Choong, Rami Beidas, Jianwen Zhu:
Parallelizing Simulated Annealing-Based Placement Using GPGPU. FPL 2010: 31-34
2000 – 2009
- 2005
- [c3]Rami Beidas, Jianwen Zhu:
Scalable interprocedural register allocation for high level synthesis. ASP-DAC 2005: 511-516 - 2004
- [c2]Rami Beidas, Jianwen Zhu:
A queuing-theoretic performance model for context-flow system-on-chip platforms. ESTIMedia 2004: 21-26 - 2003
- [c1]Rami Beidas, Jianwen Zhu:
Performance Efficiency of Context-Flow System-on-Chip Platform. ICCAD 2003: 356-362
Coauthor Index
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