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ORCIDOmar Ragheb
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2020 – today
- 2024
[c12]Tianyi Yu, Omar Ragheb, Stephen Wicklund, Jason Helge Anderson:
MLIR-to-CGRA: A Versatile MLIR-Based Compiler Framework for CGRAs. ASAP 2024: 184-192- [c11]Omar Ragheb, Stephen Wicklund, Matthew Walker, Rami Beidas, Adham Ragab, Tianyi Yu, Jason Helge Anderson:
CGRA-ME 2.0: A Research Framework for Next-Generation CGRA Architectures and CAD. IPDPS (Workshops) 2024: 642-649 - 2023
- [c10]Jason Anderson
, Boma A. Adhi, Carlos Cortes, Emanuele Del Sozzo, Omar Ragheb, Kentaro Sano:
Exploration of Compute vs. Interconnect Tradeoffs in CGRAs for HPC. HEART 2023: 59-68 - [c9]Omar Ragheb, Rami Beidas, Jason Helge Anderson:
Statically Scheduled vs. Elastic CGRA Architectures: Impact on Mapping Feasibility. IPDPS Workshops 2023: 468-475 - 2022
- [c8]Omar Ragheb, Tianyi Yu, David Ma, Jason Helge Anderson:
Modeling and Exploration of Elastic CGRAs. FPL 2022: 404-410 - [c7]Omar Ragheb, Tianyi Yu, Rami Beidas, Jason Helge Anderson:
Elastic Multi-Context CGRAs. IPDPS Workshops 2022: 655-662 - 2021
- [c6]Jason Helge Anderson, Rami Beidas, Vimal Chacko, Hsuan Hsiao, Xiaoyi Ling, Omar Ragheb, Xinyuan Wang, Tianyi Yu:
CGRA-ME: An Open-Source Framework for CGRA Architecture and CAD Research : (Invited Paper). ASAP 2021: 156-162 - [c5]Omar Ragheb, Jason Helge Anderson:
High-Level Synthesis of Transactional Memory. ASP-DAC 2021: 481-486 - [c4]Austin Liolli, Omar Ragheb, Jason Helge Anderson:
Profiling-Based Control-Flow Reduction in High-Level Synthesis. FPT 2021: 1-6
2010 – 2019
- 2018
- [c3]Omar Ragheb, Jason Helge Anderson:
High-Level Synthesis of FPGA Circuits with Multiple Clock Domains. FCCM 2018: 109-116 - [c2]Abdul-Amir Yassine, Yasmin Afsharnejad, Omar Ragheb, Vaughn Betz, Paul Chow:
A High-Level Synthesis Case Study on Light Propagation Simulation in Turbid Media. FCCM 2018: 216 - [c1]Yasmin Afsharnejad, Abdul-Amir Yassine, Omar Ragheb, Paul Chow, Vaughn Betz:
HLS-based FPGA Acceleration of Light Propagation Simulation in Turbid Media. HEART 2018: 11:1-11:6
Coauthor Index
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