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Steven Decker

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2010 – 2019

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2013
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Ron Kapusta, Junhua Shen, Steven Decker, Hongxing Li, Eitake Ibaragi, Haiyang Zhu:
A 14b 80 MS/s SAR ADC With 73.6 dB SNDR in 65 nm CMOS. IEEE J. Solid State Circuits 48(12): 3059-3066 (2013)
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Ron Kapusta, Junhua Shen, Steven Decker, Hongxing Li, Eitake Ibaragi:
A 14b 80MS/s SAR ADC with 73.6dB SNDR in 65nm CMOS. ISSCC 2013: 472-473

2000 – 2009

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2009
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Siddharth Devarajan, Larry Singer, Dan Kelly, Steven Decker, Abhishek Kamath, Paul Wilkins:
A 16-bit, 125 MS/s, 385 mW, 78.7 dB SNR CMOS Pipeline ADC. IEEE J. Solid State Circuits 44(12): 3305-3313 (2009)
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Siddharth Devarajan, Larry Singer, Dan Kelly, Steven Decker, Abhishek Kamath, Paul Wilkins:
A 16b 125MS/s 385mW 78.7dB SNR CMOS pipeline ADC. ISSCC 2009: 86-87

1990 – 1999

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1998
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Steven Decker, R. Daniel McGrath, Kevin Brehmer, Charles G. Sodini:
A 256×256 CMOS imaging array with wide dynamic range pixels and column-parallel digital output. IEEE J. Solid State Circuits 33(12): 2081-2091 (1998)

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