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ORCIDAssem A. M. Bsoul
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2010 – 2019
- 2016
[j2]Assem A. M. Bsoul, Steven J. E. Wilton, Kuen Hung Tsoi, Wayne Luk:
An FPGA Architecture and CAD Flow Supporting Dynamically Controlled Power Gating. IEEE Trans. Very Large Scale Integr. Syst. 24(1): 178-191 (2016)- 2014
- [j1]Assem A. M. Bsoul, Steven J. E. Wilton:
A Configurable Architecture to Limit Inrush Current in Power-Gated Reconfigurable Devices. J. Low Power Electron. 10(1): 1-15 (2014) - [c6]Rehan Ahmed, Assem A. M. Bsoul, Steven J. E. Wilton, Peter Hallschmid, Richard Klukas:
High-level synthesis-based design methodology for Dynamic Power-Gated FPGAs. FPL 2014: 1-4 - 2013
- [c5]Assem A. M. Bsoul, Reynald Hoskinson, Milen Ivanov, Shahriar Mirabbasi, Hamid Abdollahi:
Implementation of an FPGA-based low-power video processing module for a head-mounted display system. ICCE 2013: 214-217 - 2012
- [c4]Assem A. M. Bsoul, Steven J. E. Wilton:
A configurable architecture to limit wakeup current in dynamically-controlled power-gated FPGAs. FPGA 2012: 245-254 - [c3]Assem A. M. Bsoul, Steven J. E. Wilton:
An FPGA with power-gated switch blocks. FPT 2012: 87-94 - 2010
- [c2]Assem A. M. Bsoul, Naraig Manjikian, Li Shang:
Reliability- and process variation-aware placement for FPGAs. DATE 2010: 1809-1814 - [c1]Assem A. M. Bsoul, Steven J. E. Wilton:
An FPGA architecture supporting dynamically controlled power gating. FPT 2010: 1-8
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