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Junhao Shi
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Books and Theses
- 2007
- [b1]Junhao Shi:
Boolean Techniques in Testing of Digital Circuits (Boolesche Techniken zum Testen von digitale Schaltkreise). Bremen University, Germany, 2007
Journal Articles
- 2023
- [j5]Jie Zhang
, Junhao Shi, Junhai Huang, Qihuan Wu, Yuwen Zhao
, Jinzhao Yang, Hamed Rajabi
, Zhigang Wu, Haijun Peng, Jianing Wu
:
In Situ Reconfigurable Continuum Robot with Varying Curvature Enabled by Programmable Tensegrity Building Blocks. Adv. Intell. Syst. 5(7) (2023) - 2021
- [j4]Junhao Shi, Decheng Zuo
, Zhan Zhang:
A GAN-based data augmentation method for human activity recognition via the caching ability. Internet Technol. Lett. 4(5) (2021) - 2020
- [j3]Junhao Shi
, Decheng Zuo, Zhan Zhang, Danyan Luo:
Sensor-based activity recognition independent of device placement and orientation. Trans. Emerg. Telecommun. Technol. 31(4) (2020) - [j2]Junhao Shi, Decheng Zuo
, Zhan Zhang:
Transition Activity Recognition System based on Standard Deviation Trend Analysis. Sensors 20(11): 3117 (2020) - 2004
- [j1]Rolf Drechsler
, Junhao Shi, Görschwin Fey
:
Synthesis of fully testable circuits from BDDs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(3): 440-443 (2004)
Conference and Workshop Papers
- 2022
- [c8]Junhao Shi:
A Predictive Model of Spindle Thermal Error Based on DCGAN. ICMRE 2022: 1-5 - 2011
- [c7]Junhao Shi, Mingmin Zhang, Zhigeng Pan
:
A real-time bimanual 3D interaction method based on bare-hand tracking. ACM Multimedia 2011: 1073-1076 - 2006
- [c6]Görschwin Fey, Junhao Shi, Rolf Drechsler:
Efficiency of Multi-Valued Encoding in SAT-based ATPG. ISMVL 2006: 25 - 2005
- [c5]Junhao Shi, Görschwin Fey, Rolf Drechsler:
Bridging fault testability of BDD circuits. ASP-DAC 2005: 188-191 - [c4]Junhao Shi, Görschwin Fey, Rolf Drechsler, Andreas Glowatz, Friedrich Hapke, Jürgen Schlöffel:
PASSAT: Efficient SAT-Based Test Pattern Generation for Industrial Circuits. ISVLSI 2005: 212-217 - 2004
- [c3]Görschwin Fey
, Junhao Shi, Rolf Drechsler
:
BDD Circuit Optimization for Path Delay Fault Testability. DSD 2004: 168-172 - 2003
- [c2]Junhao Shi, Görschwin Fey
, Rolf Drechsler
:
BDD Based Synthesis of Symmetric Functions with Full Path-Delay Fault Testability. Asian Test Symposium 2003: 290-293 - [c1]Rolf Drechsler, Junhao Shi, Görschwin Fey:
MuTaTe: an efficient design for testability technique for multiplexor based circuits. ACM Great Lakes Symposium on VLSI 2003: 80-83
Coauthor Index
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