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"Partial order method for timed simulation of system-level MPSoC designs."

Eric Cheung, Harry Hsieh, Felice Balarin (2009)

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DOI: 10.1109/ASPDAC.2009.4796472

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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  dblp key:
  - conf/aspdac/CheungHB09
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  persistent URL:
  - https://dblp.org/rec/conf/aspdac/CheungHB09
Eric Cheung, Harry Hsieh, Felice Balarin:
Partial order method for timed simulation of system-level MPSoC designs. ASP-DAC 2009: 149-154

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