"A Gate-Delay Model for high-Speed CMOS Circuits."

Florentin Dartu et al. (1994)

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DOI: 10.1145/196244.196562

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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Florentin Dartu, Noel Menezes, Jessica Qian, Lawrence T. Pillage:
A Gate-Delay Model for high-Speed CMOS Circuits. DAC 1994: 576-580

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