"Impact of interconnect variations on the clock skew of a gigahertz ..."

Ying Liu et al. (2000)

> Home

Details and statistics

DOI: 10.1145/337292.337365

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/dac/LiuNPS00
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/dac/LiuNPS00
Ying Liu, Sani R. Nassif, Lawrence T. Pileggi, Andrzej J. Strojwas:
Impact of interconnect variations on the clock skew of a gigahertz microprocessor. DAC 2000: 168-171

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.