"JPlace: A Clock-Aware Length-Matching Placement for Rapid ..."

Siyan Chen et al. (2024)

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DOI: 10.23919/DATE58400.2024.10546887

access: closed

type: Conference or Workshop Paper

metadata version: 2024-09-30

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Siyan Chen, Rongliang Fu, Junying Huang, Zhimin Zhang, Xiaochun Ye, Tsung-Yi Ho, Dongrui Fan:
JPlace: A Clock-Aware Length-Matching Placement for Rapid Single-Flux-Quantum Circuits. DATE 2024: 1-6

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