"1/f Noise in 3D vertical gate-all-around junction-less silicon nanowire ..."

Chhandak Mukherjee et al. (2017)

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DOI: 10.1109/ESSDERC.2017.8066585

access: closed

type: Conference or Workshop Paper

metadata version: 2019-12-27

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Chhandak Mukherjee, Cristell Maneux, Julien Pezard, Guilhem Larrieu:
1/f Noise in 3D vertical gate-all-around junction-less silicon nanowire transistors. ESSDERC 2017: 34-37

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