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"Reduction calculator in an FPGA based switching Hub for high performance ..."

Takuya Kuhara et al. (2015)

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DOI: 10.1109/FPL.2015.7293985

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-30

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Takuya Kuhara, Chiharu Tsuruta, Toshihiro Hanawa, Hideharu Amano:
Reduction calculator in an FPGA based switching Hub for high performance clusters. FPL 2015: 1-4

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