"JBSA: A Bit-Serial Accelerator for Deep Neural Networks Using ..."

Yang Su et al. (2025)

> Home

Details and statistics

DOI: 10.1145/3721145.3729517

access: closed

type: Conference or Workshop Paper

metadata version: 2025-09-25

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/ics/SuLJYFHY0RGHF25
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/ics/SuLJYFHY0RGHF25
Yang Su, Sheng Li, Huilong Jiang, Haofei Yin, Rongliang Fu, Junying Huang, Xiaochun Ye, Zhimin Zhang, Jie Ren, Xiaoping Gao, Tsung-Yi Ho, Dongrui Fan:
JBSA: A Bit-Serial Accelerator for Deep Neural Networks Using Superconducting SFQ Logic. ICS 2025: 1092-1105

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.