"Negative Capacitance FET 8T SRAM Computing in-Memory based Logic Design ..."

Venu Birudu et al. (2024)

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DOI: 10.1109/ISCAS58744.2024.10558683

access: closed

type: Conference or Workshop Paper

metadata version: 2024-07-16

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Venu Birudu, Tirumalarao Kadiyam, Koteswararao Penumalli, Aditya Japa, Sushma Nirmala Sambatur, Chongyan Gu, Siva Sankar Yellampalli, Ramesh Vaddi:
Negative Capacitance FET 8T SRAM Computing in-Memory based Logic Design for Energy Efficient AI Edge Devices. ISCAS 2024: 1-5

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