"A clock recovery circuit for blind equalization multi-Gbps serial data links."

Jiawen Hu (2006)

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DOI: 10.1109/ISCAS.2006.1693795

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Jiawen Hu:
A clock recovery circuit for blind equalization multi-Gbps serial data links. ISCAS 2006

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