"A model-first design and verification flow for analog-digital convergence ..."

Jaeha Kim et al. (2012)

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DOI: 10.1109/ISCAS.2012.6272147

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Jaeha Kim, Sigang Ryu, Byoung-Joo Yoo, Hanseok Kim, Yunju Choi, Deog-Kyoon Jeong:
A model-first design and verification flow for analog-digital convergence systems: A high-speed receiver example in digital TVs. ISCAS 2012: 754-757

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