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"A low-power VLSI architecture for a shared-memory FFT processor with a ..."

Shuenn-Yuh Lee et al. (2006)

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DOI: 10.1109/ISCAS.2006.1692546

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Shuenn-Yuh Lee, Chia-Chyang Chen, Shyh-Chyang Lee, Chih-Jen Cheng:
A low-power VLSI architecture for a shared-memory FFT processor with a mixed-radix algorithm and a simple memory control scheme. ISCAS 2006

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