"An all-digital bit transistor characterization scheme for CMOS 6T SRAM array."

Geng-Cing Lin et al. (2012)

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DOI: 10.1109/ISCAS.2012.6271804

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Geng-Cing Lin, Shao-Cheng Wang, Yi-Wei Lin, Ming-Chien Tsai, Ching-Te Chuang, Shyh-Jye Jou, Nan-Chun Lien, Wei-Chiang Shih, Kuen-Di Lee, Jyun-Kai Chu:
An all-digital bit transistor characterization scheme for CMOS 6T SRAM array. ISCAS 2012: 2485-2488

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