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2020 – today
- 2024
[j10]Yi-Wei Zhang, Yanpei Guo, Yuhao Feng
, Zhenhua Zhang, Rong Tang, Yun-Hao Bai, Hong-Tu Zhang, Yi-Wei Lin, Jiangling Zhu, Tiejun Wang, Zhiyao Tang:
Satellite hyperspectral imagery reveals scale dependence of functional diversity patterns in a Qinghai-Tibetan alpine meadow. Int. J. Appl. Earth Obs. Geoinformation 129: 103868 (2024)- [c19]Wen-Yue Lin, Lin-Hung Lai, Yi-Wei Lin, Chen-Yi Lee:
A Programmable CMOS Dielectrophoresis Array Chip with 128 × 128 Electrodes for Cell Manipulation. ISCAS 2024: 1-5 - [c18]Heng-Yu Liu, Lin-Hung Lai, Wen-Yue Lin, Yu-Wei Lu, Yi-Wei Lin, Chen-Yi Lee:
A 2.56-µs Dynamic Range, 31.25-ps Resolution 2-D Vernier Digital-to-Time Converter (DTC) for Cell-Monitoring. ISCAS 2024: 1-5 - 2023
- [j9]Ting-Chia Hsu, Ching Chang, Yi-Wei Lin:
Effects of voice assistant creation using different learning approaches on performance of computational thinking. Comput. Educ. 192: 104657 (2023) - 2022
- [j8]Hsien-Sheng Hsiao, Yi-Wei Lin, Kuen-Yi Lin, Chien-Yu Lin, Jheng-Han Chen, Jyun-Chen Chen:
Using robot-based practices to develop an activity that incorporated the 6E model to improve elementary school students' learning performances. Interact. Learn. Environ. 30(1): 85-99 (2022) - [c17]Chih Ming Tsai, Yi-Wei Lin:
Understanding Intention to Use Netflix in Taiwan: Integrating Perceived Value into the Technology Acceptance Model. ICISE 2022: 73-79
2010 – 2019
- 2017
- [j7]Yi-Wei Lin, Shawn S. H. Hsu:
A Sierpinski Space-Filling Clock Tree Using Multiply-by-3 Fractal-Coupled Ring Oscillators. IEEE J. Solid State Circuits 52(11): 2947-2962 (2017) - 2014
- [c16]Eric Hsueh-Chan Lu, Yi-Wei Lin, Jing-Bin Ciou:
Mining mobile application sequential patterns for usage prediction. GrC 2014: 185-190 - 2013
- [j6]Kuo-Ming Tsai, Yi-Wei Lin:
Quality improvement of optical lenses using innovative runner design. Int. J. Manuf. Res. 8(4): 337-356 (2013) - [c15]Chi-Shin Chang, Hao-I Yang, Wei-Nan Liao, Yi-Wei Lin, Nan-Chun Lien, Chien-Hen Chen, Ching-Te Chuang, Wei Hwang, Shyh-Jye Jou, Ming-Hsien Tu, Huan-Shun Huang, Yong-Jyun Hu, Paul-Sen Kan, Cheng-Yo Cheng, Wei-Chang Wang, Jian-Hao Wang, Kuen-Di Lee, Chia-Cheng Chen, Wei-Chiang Shih:
A 40nm 1.0Mb pipeline 6T SRAM with variation-tolerant Step-Up Word-Line and Adaptive Data-Aware Write-Assist. ISCAS 2013: 1468-1471 - 2012
- [j5]Su-Hai Hsiang, Yi-Wei Lin, Jhong-Wei Lai:
Application of fuzzy-based Taguchi method to the optimization of extrusion of magnesium alloy bicycle carriers. J. Intell. Manuf. 23(3): 629-638 (2012) - [j4]Chun-Yu Lin, Yi-Wei Lin, Shang-Wen Yu, Yu-Shu Lo, Jinn-Moon Yang:
MoNetFamily: a web server to infer homologous modules and module-module interaction networks in vertebrates. Nucleic Acids Res. 40(Web-Server-Issue): 263-270 (2012) - [c14]Shao-Cheng Wang, Geng-Cing Lin, Yi-Wei Lin, Ming-Chien Tsai, Yi-Wei Chiu, Shyh-Jye Jou, Ching-Te Chuang, Nan-Chun Lien, Wei-Chiang Shih, Kuen-Di Lee, Jyun-Kai Chu:
Design and implementation of dynamic Word-Line pulse write margin monitor for SRAM. APCCAS 2012: 116-119 - [c13]Hao-I Yang, Yi-Wei Lin, Mao-Chih Hsia, Geng-Cing Lin, Chi-Shin Chang, Yin-Nien Chen, Ching-Te Chuang, Wei Hwang, Shyh-Jye Jou, Nan-Chun Lien, Hung-Yu Li, Kuen-Di Lee, Wei-Chiang Shih, Ya-Ping Wu, Wen-Ta Lee, Chih-Chiang Hsu:
High-performance 0.6V VMIN 55nm 1.0Mb 6T SRAM with adaptive BL bleeder. ISCAS 2012: 1831-1834 - [c12]Geng-Cing Lin, Shao-Cheng Wang, Yi-Wei Lin, Ming-Chien Tsai, Ching-Te Chuang, Shyh-Jye Jou, Nan-Chun Lien, Wei-Chiang Shih, Kuen-Di Lee, Jyun-Kai Chu:
An all-digital bit transistor characterization scheme for CMOS 6T SRAM array. ISCAS 2012: 2485-2488 - [c11]Yi-Wei Lin, Hao-I Yang, Geng-Cing Lin, Chi-Shin Chang, Ching-Te Chuang, Wei Hwang, Chia-Cheng Chen, Willis Shih, Huan-Shun Huang:
A 55nm 0.55v 6T SRAM with variation-tolerant dual-tracking word-line under-drive and data-aware write-assist. ISLPED 2012: 79-84 - [c10]Yung-Wei Lin, Hao-I Yang, Mao-Chih Hsia, Yi-Wei Lin, Chien-Hen Chen, Ching-Te Chuang, Wei Hwang, Nan-Chun Lien, Kuen-Di Lee, Wei-Chiang Shih, Ya-Ping Wu, Wen-Ta Lee, Chih-Chiang Hsu:
A 55nm 0.5V 128Kb cross-point 8T SRAM with data-aware dynamic supply Write-assist. SoCC 2012: 218-223 - [c9]Yi-Wei Lin, Ming-Chien Tsai, Hao-I Yang, Geng-Cing Lin, Shao-Cheng Wang, Ching-Te Chuang, Shyh-Jye Jou, Wei Hwang, Nan-Chun Lien, Kuen-Di Lee, Wei-Chiang Shih:
An all-digital Read Stability and Write Margin characterization scheme for CMOS 6T SRAM array. VLSI-DAT 2012: 1-4 - [c8]Ming-Chien Tsai, Yi-Wei Lin, Hao-I Yang, Ming-Hsien Tu, Wei-Chiang Shih, Nan-Chun Lien, Kuen-Di Lee, Shyh-Jye Jou, Ching-Te Chuang, Wei Hwang:
Embedded SRAM ring oscillator for in-situ measurement of NBTI and PBTI degradation in CMOS 6T SRAM array. VLSI-DAT 2012: 1-4 - 2011
- [j3]Yi-Wei Lin, Malgorzata Marek-Sadowska, Wojciech Maly:
On Cell Layout-Performance Relationships in VeSFET-Based, High-Density Regular Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(2): 229-241 (2011) - [c7]Hao-I Yang, Shih-Chi Yang, Mao-Chih Hsia, Yung-Wei Lin, Yi-Wei Lin, Chien-Hen Chen, Chi-Shin Chang, Geng-Cing Lin, Yin-Nien Chen, Ching-Te Chuang, Wei Hwang, Shyh-Jye Jou, Nan-Chun Lien, Hung-Yu Li, Kuen-Di Lee, Wei-Chiang Shih, Ya-Ping Wu, Wen-Ta Lee, Chih-Chiang Hsu:
A high-performance low VMIN 55nm 512Kb disturb-free 8T SRAM with adaptive VVSS control. SoCC 2011: 197-200 - 2010
- [j2]Yi-Wei Lin, Malgorzata Marek-Sadowska, Wojciech Maly:
Layout Generator for Transistor-Level High-Density Regular Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(2): 197-210 (2010) - [c6]Yi-Wei Lin, Malgorzata Marek-Sadowska, Wojciech Maly:
Performance study of VeSFET-based, high-density regular circuits. ISPD 2010: 161-168
2000 – 2009
- 2009
- [c5]Yi-Wei Lin, Malgorzata Marek-Sadowska, Wojciech Maly:
Transistor-level layout of high-density regular circuits. ISPD 2009: 83-90 - 2008
- [c4]Yi-Wei Lin, Malgorzata Marek-Sadowska, Wojciech Maly, Andrzej Pfitzner, Dominik Kasprowicz:
Is there always performance overhead for regular fabric? ICCD 2008: 557-562 - 2007
- [c3]Wojciech Maly, Yi-Wei Lin, Malgorzata Marek-Sadowska:
OPC-Free and Minimally Irregular IC Design Style. DAC 2007: 954-957 - 2006
- [j1]Chung-Ming Huang, Tz-Heng Hsu, Yi-Wei Lin:
REDUP: a packet loss recovery scheme for real-time audio streaming over wireless IP networks. J. Syst. Softw. 79(1): 29-42 (2006) - 2004
- [c2]Yi-Wei Lin, Jing-Yang Jou:
An efficient approach for hierarchical submodule extraction. ISCAS (5) 2004: 237-240 - 2003
- [c1]Chung-Ming Huang, Yuan-Tse Yu, Yi-Wei Lin:
An Adaptive Control Scheme for Real-Time Media Streaming over Wireless Networks. AINA 2003: 373-378
Coauthor Index
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