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"A delay circuit with 4-terminal magnetic-random-access-memory device for ..."

Ryusuke Nebashi et al. (2014)

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DOI: 10.1109/ISCAS.2014.6865453

access: closed

type: Conference or Workshop Paper

metadata version: 2021-10-14

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  - conf/iscas/NebashiSHMTITMFKHEKOS14
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  - https://dblp.org/rec/conf/iscas/NebashiSHMTITMFKHEKOS14
Ryusuke Nebashi, Noboru Sakimura, Hiroaki Honjo, Ayuka Morioka, Yukihide Tsuji, Kunihiko Ishihara, Keiichi Tokutome, Sadahiko Miura, Shunsuke Fukami, Keizo Kinoshita, Takahiro Hanyu, Tetsuo Endoh, Naoki Kasai, Hideo Ohno, Tadahiko Sugibayashi:
A delay circuit with 4-terminal magnetic-random-access-memory device for power-efficient time- domain signal processing. ISCAS 2014: 1588-1591

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