"Instruction-based delay fault self-testing of pipelined processor cores."

Virendra Singh et al. (2005)

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DOI: 10.1109/ISCAS.2005.1465928

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Virendra Singh, Michiko Inoue, Kewal K. Saluja, Hideo Fujiwara:
Instruction-based delay fault self-testing of pipelined processor cores. ISCAS (6) 2005: 5686-5689

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