"A Two-pole Circuit Model for VLSI High-speed Interconnection."

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

Dian Zhou et al. (1993)

> Home

Details and statistics

DOI: —

access: unavailable

type: Conference or Workshop Paper

metadata version: 2016-05-20

- no documents available
- export record
  dblp key:
  - conf/iscas/ZhouSTGC93
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/iscas/ZhouSTGC93
Dian Zhou, S. Su, F. Tsui, D. S. Gao, Jason Cong:
A Two-pole Circuit Model for VLSI High-speed Interconnection. ISCAS 1993: 2129-2132

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.