"Design of ultra-low-leakage logic gates and flip-flops in high-performance ..."

Ajay N. Bhoj, Niraj K. Jha (2011)

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DOI: 10.1109/ISQED.2011.5770805

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-25

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Ajay N. Bhoj, Niraj K. Jha:
Design of ultra-low-leakage logic gates and flip-flops in high-performance FinFET technology. ISQED 2011: 695-702

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