"6-T SRAM performance assessment with stacked silicon nanowire MOSFETs."

Ya-Chi Huang et al. (2015)

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DOI: 10.1109/ISQED.2015.7085497

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-25

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Ya-Chi Huang, Meng-Hsueh Chiang, Wei-Chou Hsu, Shiou-Ying Cheng:
6-T SRAM performance assessment with stacked silicon nanowire MOSFETs. ISQED 2015: 610-614

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