"A 1.5GHz 890μW digital MDLL with 400fsrms integrated jitter, -55.6dBc ..."

Amr Elshazly et al. (2012)

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DOI: 10.1109/ISSCC.2012.6176993

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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Amr Elshazly, Rajesh Inti, Brian Young, Pavan Kumar Hanumolu:
A 1.5GHz 890μW digital MDLL with 400fsrms integrated jitter, -55.6dBc reference spur and 20fs/mV supply-noise sensitivity using 1b TDC. ISSCC 2012: 242-244

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