"26.4 A 25.6Gb/s differential and DDR4/GDDR5 dual-mode transmitter with ..."

Tzu-Chien Hsueh et al. (2014)

> Home

Details and statistics

DOI: 10.1109/ISSCC.2014.6757506

access: closed

type: Conference or Workshop Paper

metadata version: 2020-10-25

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/isscc/HsuehBJHKKMSISM14
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isscc/HsuehBJHKKMSISM14
Tzu-Chien Hsueh, Ganesh Balamurugan, James E. Jaussi, Sami Hyvonen, Joseph T. Kennedy, Gökçe Keskin, Tawfiq Musah, Sudip Shekhar, Rajesh Inti, Shreyas Sen, Mozhgan Mansuri, Clark Roberts, Bryan Casper:
26.4 A 25.6Gb/s differential and DDR4/GDDR5 dual-mode transmitter with digital clock calibration in 22nm CMOS. ISSCC 2014: 444-445

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.