"A digitally stabilized type-III PLL using ring VCO with 1.01psrms ..."

Akihide Sai et al. (2012)

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DOI: 10.1109/ISSCC.2012.6176996

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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Akihide Sai, Yuka Kobayashi, Shigehito Saigusa, Osamu Watanabe, Tetsuro Itakura:
A digitally stabilized type-III PLL using ring VCO with 1.01psrms integrated jitter in 65nm CMOS. ISSCC 2012: 248-250

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