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"Parity prediction synthesis for nano-electronic gate designs."
D. A. Tran et al. (2010)
- D. A. Tran, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Hans-Joachim Wunderlich:

Parity prediction synthesis for nano-electronic gate designs. ITC 2010: 820

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