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ORCIDHans-Joachim Wunderlich
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- affiliation: University of Stuttgart, Germany
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2020 – today
- 2023
[j58]Zahra Paria Najafi-Haghi
, Hans-Joachim Wunderlich:
Identifying Resistive Open Defects in Embedded Cells under Variations. J. Electron. Test. 39(1): 27-40 (2023)- 2022
- [j57]Natalia Lylina, Chih-Hao Wang, Hans-Joachim Wunderlich:
A Complete Design-for-Test Scheme for Reconfigurable Scan Networks. J. Electron. Test. 38(6): 603-621 (2022) - [j56]Natalia Lylina, Chih-Hao Wang, Hans-Joachim Wunderlich:
SCAR: Security Compliance Analysis and Resynthesis of Reconfigurable Scan Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(12): 5644-5656 (2022) - [c211]Natalia Lylina, Chih-Hao Wang, Hans-Joachim Wunderlich:
Online Periodic Test of Reconfigurable Scan Networks. ATS 2022: 78-83 - [c210]Hussam Amrouch, Jens Anders, Steffen Becker, Maik Betka, Gerd Bleher, Peter Domanski, Nourhan Elhamawy, Thomas Ertl, Athanasios Gatzastras, Paul R. Genssler, Sebastian Hasler, Martin Heinrich, André van Hoorn, Hanieh Jafarzadeh, Ingmar Kallfass, Florian Klemme, Steffen Koch, Ralf Küsters, Andrés Lalama, Raphaël Latty, Yiwen Liao, Natalia Lylina, Zahra Paria Najafi-Haghi, Dirk Pflüger, Ilia Polian, Jochen Rivoir, Matthias Sauer, Denis Schwachhofer, Steffen Templin, Christian Volmer, Stefan Wagner, Daniel Weiskopf, Hans-Joachim Wunderlich, Bin Yang, Martin Zimmermann:
Intelligent Methods for Test and Reliability. DATE 2022: 969-974 - [c209]Natalia Lylina, Chih-Hao Wang, Hans-Joachim Wunderlich:
Robust Reconfigurable Scan Networks. DATE 2022: 1149-1152 - [c208]Zahra Paria Najafi-Haghi, Florian Klemme, Hussam Amrouch, Hans-Joachim Wunderlich:
On Extracting Reliability Information from Speed Binning. ETS 2022: 1-4 - [c207]Yiwen Liao, Zahra Paria Najafi-Haghi, Hans-Joachim Wunderlich, Bin Yang:
Efficient and Robust Resistive Open Defect Detection Based on Unsupervised Deep Learning. ITC 2022: 185-193 - 2021
- [j55]Somayeh Sadeghi Kohan, Sybille Hellebrand, Hans-Joachim Wunderlich:
Stress-Aware Periodic Test of Interconnects. J. Electron. Test. 37(5): 715-728 (2021) - [c206]Chih-Hao Wang, Natalia Lylina, Ahmed Atteya, Tong-Yu Hsieh, Hans-Joachim Wunderlich:
Concurrent Test of Reconfigurable Scan Networks for Self-Aware Systems. IOLTS 2021: 1-7 - [c205]Natalia Lylina, Chih-Hao Wang, Hans-Joachim Wunderlich:
Testability-Enhancing Resynthesis of Reconfigurable Scan Networks. ITC 2021: 20-29 - [c204]Zahra Paria Najafi-Haghi, Hans-Joachim Wunderlich:
Resistive Open Defect Classification of Embedded Cells under Variations. LATS 2021: 1-6 - [c203]Natalia Lylina, Ahmed Atteya, Hans-Joachim Wunderlich:
A Hybrid Protection Scheme for Reconfigurable Scan Networks. VTS 2021: 1-7 - 2020
- [c202]Sebastian Brandhofer, Michael A. Kochte, Hans-Joachim Wunderlich:
Synthesis of Fault-Tolerant Reconfigurable Scan Networks. DATE 2020: 798-803 - [c201]Chang Liu, Eric Schneider, Hans-Joachim Wunderlich:
Using Programmable Delay Monitors for Wear-Out and Early Life Failure Prediction. DATE 2020: 804-809 - [c200]Eric Schneider, Hans-Joachim Wunderlich:
GPU-accelerated Time Simulation of Systems with Adaptive Voltage and Frequency Scaling. DATE 2020: 879-884 - [c199]Zahra Paria Najafi-Haghi, Marzieh Hashemipour-Nazari, Hans-Joachim Wunderlich:
Variation-Aware Defect Characterization at Cell Level. ETS 2020: 1-6 - [c198]Stefan Holst, Matthias Kampmann, Alexander Sprenger, Jan Dennis Reimer, Sybille Hellebrand, Hans-Joachim Wunderlich, Xiaoqing Wen:
Logic Fault Diagnosis of Hidden Delay Defects. ITC 2020: 1-10 - [c197]Natalia Lylina, Ahmed Atteya, Chih-Hao Wang, Hans-Joachim Wunderlich:
Security Preserving Integration and Resynthesis of Reconfigurable Scan Networks. ITC 2020: 1-10 - [c196]Eric Schneider, Hans-Joachim Wunderlich:
Switch Level Time Simulation of CMOS Circuits with Adaptive Voltage and Frequency Scaling. VTS 2020: 1-6
2010 – 2019
- 2019
- [j54]Eric Schneider, Hans-Joachim Wunderlich:
Multi-level timing and fault simulation on GPUs. Integr. 64: 78-91 (2019) - [j53]Eric Schneider, Hans-Joachim Wunderlich:
SWIFT: Switch-Level Fault Simulation on GPUs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(1): 122-135 (2019) - [j52]Matthias Kampmann, Michael A. Kochte, Chang Liu, Eric Schneider, Sybille Hellebrand, Hans-Joachim Wunderlich:
Built-In Test for Hidden Delay Faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(10): 1956-1968 (2019) - [c195]Pascal Raiola, Benjamin Thiemann, Jan Burchard, Ahmed Atteya, Natalia Lylina, Hans-Joachim Wunderlich, Bernd Becker, Matthias Sauer:
On Secure Data Flow in Reconfigurable Scan Networks. DATE 2019: 1016-1021 - [c194]Stefan Holst, Eric Schneider, Michael A. Kochte, Xiaoqing Wen, Hans-Joachim Wunderlich:
Variation-Aware Small Delay Fault Diagnosis on Compressed Test Responses. ITC 2019: 1-10 - [c193]Natalia Lylina, Ahmed Atteya, Pascal Raiola, Matthias Sauer, Bernd Becker, Hans-Joachim Wunderlich:
Security Compliance Analysis of Reconfigurable Scan Networks. ITC 2019: 1-9 - 2018
- [j51]Hans-Joachim Wunderlich, Yervant Zorian:
Guest Editor's Introduction. IEEE Des. Test 35(3): 5-6 (2018) - [j50]Michael A. Kochte, Hans-Joachim Wunderlich:
Self-Test and Diagnosis for Self-Aware Systems. IEEE Des. Test 35(5): 7-18 (2018) - [j49]Sybille Hellebrand, Jörg Henkel, Anand Raghunathan, Hans-Joachim Wunderlich:
Guest Editors' Introduction. IEEE Embed. Syst. Lett. 10(1): 1 (2018) - [c192]Eric Schneider, Michael A. Kochte, Hans-Joachim Wunderlich:
Multi-level timing simulation on GPUs. ASP-DAC 2018: 470-475 - [c191]Chang Liu, Eric Schneider, Matthias Kampmann, Sybille Hellebrand, Hans-Joachim Wunderlich:
Extending Aging Monitors for Early Life and Wear-Out Failure Prevention. ATS 2018: 92-97 - [c190]Yucong Zhang, Xiaoqing Wen, Stefan Holst, Kohei Miyase, Seiji Kajihara, Hans-Joachim Wunderlich, Jun Qian:
Clock-Skew-Aware Scan Chain Grouping for Mitigating Shift Timing Failures in Low-Power Scan Testing. ATS 2018: 149-154 - [c189]Ahmed Atteya, Michael A. Kochte, Matthias Sauer, Pascal Raiola, Bernd Becker, Hans-Joachim Wunderlich:
Online prevention of security violations in reconfigurable scan networks. ETS 2018: 1-6 - [c188]Daniel Kraak, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Francky Catthoor, Abhijit Chatterjee, Adit D. Singh, Hans-Joachim Wunderlich, Naghmeh Karimi:
Device aging: A reliability and security concern. ETS 2018: 1-10 - [c187]Pascal Raiola, Michael A. Kochte, Ahmed Atteya, Laura Rodríguez Gómez, Hans-Joachim Wunderlich, Bernd Becker, Matthias Sauer:
Detecting and Resolving Security Violations in Reconfigurable Scan Networks. IOLTS 2018: 91-96 - 2017
- [j48]Gert Schley, Atefe Dalirsani, Marcus Eggenberger, Nadereh Hatami, Hans-Joachim Wunderlich, Martin Radetzki:
Multi-Layer Diagnosis for Fault-Tolerant Networks-on-Chip. IEEE Trans. Computers 66(5): 848-861 (2017) - [j47]Hongyan Zhang, Lars Bauer, Michael A. Kochte, Eric Schneider, Hans-Joachim Wunderlich, Jörg Henkel:
Aging Resilience and Fault Tolerance in Runtime Reconfigurable Architectures. IEEE Trans. Computers 66(6): 957-970 (2017) - [j46]Eric Schneider, Michael A. Kochte, Stefan Holst, Xiaoqing Wen, Hans-Joachim Wunderlich:
GPU-Accelerated Simulation of Small Delay Faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(5): 829-841 (2017) - [c186]Dominik Ull, Michael A. Kochte, Hans-Joachim Wunderlich:
Structure-Oriented Test of Reconfigurable Scan Networks. ATS 2017: 127-132 - [c185]Michael A. Kochte, Matthias Sauer, Laura Rodríguez Gómez, Pascal Raiola, Bernd Becker, Hans-Joachim Wunderlich:
Specification and verification of security in reconfigurable scan networks. ETS 2017: 1-6 - [c184]Marcus Wagner, Hans-Joachim Wunderlich:
Probabilistic sensitization analysis for variation-aware path delay fault test evaluation. ETS 2017: 1-6 - [c183]Alexander Schöll, Claus Braun, Hans-Joachim Wunderlich:
Energy-efficient and error-resilient iterative solvers for approximate computing. IOLTS 2017: 237-239 - [c182]Stefan Holst, Eric Schneider, Koshi Kawagoe, Michael A. Kochte, Kohei Miyase, Hans-Joachim Wunderlich, Seiji Kajihara, Xiaoqing Wen:
Analysis and mitigation or IR-Drop induced scan shift-errors. ITC 2017: 1-8 - [c181]Michael A. Kochte, Rafal Baranowski, Hans-Joachim Wunderlich:
Trustworthy reconfigurable access to on-chip infrastructure. ITC-Asia 2017: 119-124 - [c180]Jyotirmoy V. Deshmukh, Wolfgang Kunz, Hans-Joachim Wunderlich, Sybille Hellebrand:
Special session on early life failures. VTS 2017: 1 - [c179]Chang Liu, Michael A. Kochte, Hans-Joachim Wunderlich:
Aging monitor reuse for small delay fault testing. VTS 2017: 1-6 - 2016
- [c178]Dominik Erb, Karsten Scheibler, Michael A. Kochte, Matthias Sauer, Hans-Joachim Wunderlich, Bernd Becker:
Mixed 01X-RSL-Encoding for fast and accurate ATPG with unknowns. ASP-DAC 2016: 749-754 - [c177]Stefan Holst, Eric Schneider, Xiaoqing Wen, Seiji Kajihara, Yuta Yamato, Hans-Joachim Wunderlich, Michael A. Kochte:
Timing-Accurate Estimation of IR-Drop Impact on Logic- and Clock-Paths During At-Speed Scan Test. ATS 2016: 19-24 - [c176]Michael A. Kochte, Rafal Baranowski, Marcel Schaal, Hans-Joachim Wunderlich:
Test Strategies for Reconfigurable Scan Networks. ATS 2016: 113-118 - [c175]Laura Rodríguez Gómez, Hans-Joachim Wunderlich:
A Neural-Network-Based Fault Classifier. ATS 2016: 144-149 - [c174]Eric Schneider, Hans-Joachim Wunderlich:
High-Throughput Transistor-Level Fault Simulation on GPUs. ATS 2016: 150-155 - [c173]Jin-Cun Ye, Michael A. Kochte, Kuen-Jong Lee, Hans-Joachim Wunderlich:
Autonomous Testing for 3D-ICs with IEEE Std. 1687. ATS 2016: 215-220 - [c172]Atefe Dalirsani, Hans-Joachim Wunderlich:
Functional Diagnosis for Graceful Degradation of NoC Switches. ATS 2016: 246-251 - [c171]Alexander Schöll, Claus Braun, Hans-Joachim Wunderlich:
Applying efficient fault tolerance to enable the preconditioned conjugate gradient solver on approximate computing hardware. DFT 2016: 21-26 - [c170]Alexander Schöll, Claus Braun, Michael A. Kochte, Hans-Joachim Wunderlich:
Efficient Algorithm-Based Fault Tolerance for Sparse Matrix Operations. DSN 2016: 251-262 - [c169]Michael A. Kochte, Rafal Baranowski, Matthias Sauer, Bernd Becker, Hans-Joachim Wunderlich:
Formal verification of secure reconfigurable scan network infrastructure. ETS 2016: 1-6 - [c168]Hans-Joachim Wunderlich, Peter C. Maxwell:
ETS 2015 best paper. ETS 2016: 1 - [c167]Hans-Joachim Wunderlich, Claus Braun, Alexander Schöll:
Pushing the limits: How fault tolerance extends the scope of approximate computing. IOLTS 2016: 133-136 - [c166]Michael A. Kochte, Hans-Joachim Wunderlich:
Dependable on-chip infrastructure for dependable MPSOCs. LATS 2016: 183-188 - [c165]Hans-Joachim Wunderlich, Claus Braun, Alexander Schöll:
Fault tolerance of approximate compute algorithms. VTS 2016: 1 - 2015
- [j45]Lars Bauer, Jörg Henkel, Andreas Herkersdorf, Michael A. Kochte, Johannes Maximilian Kühn, Wolfgang Rosenstiel, Thomas Schweizer, Stefan Wallentowitz, Volker Wenzel, Thomas Wild, Hans-Joachim Wunderlich, Hongyan Zhang:
Adaptive multi-layer techniques for increased system dependability. it Inf. Technol. 57(3): 149-158 (2015) - [j44]Rafal Baranowski, Michael A. Kochte, Hans-Joachim Wunderlich:
Fine-Grained Access Management in Reconfigurable Scan Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(6): 937-946 (2015) - [j43]Dominik Erb, Michael A. Kochte, Sven Reimer, Matthias Sauer, Hans-Joachim Wunderlich, Bernd Becker:
Accurate QBF-Based Test Pattern Generation in Presence of Unknown Values. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(12): 2025-2038 (2015) - [j42]Rafal Baranowski, Michael A. Kochte, Hans-Joachim Wunderlich:
Reconfigurable Scan Networks: Modeling, Verification, and Optimal Pattern Generation. ACM Trans. Design Autom. Electr. Syst. 20(2): 30:1-30:27 (2015) - [j41]Stefan Holst, Michael E. Imhof, Hans-Joachim Wunderlich:
High-Throughput Logic Timing Simulation on GPGPUs. ACM Trans. Design Autom. Electr. Syst. 20(3): 37:1-37:22 (2015) - [c164]Koji Asada, Xiaoqing Wen, Stefan Holst, Kohei Miyase, Seiji Kajihara, Michael A. Kochte, Eric Schneider, Hans-Joachim Wunderlich, Jun Qian:
Logic/Clock-Path-Aware At-Speed Scan Test Generation for Avoiding False Capture Failures and Reducing Clock Stretch. ATS 2015: 103-108 - [c163]Matthias Kampmann, Michael A. Kochte, Eric Schneider, Thomas Indlekofer, Sybille Hellebrand, Hans-Joachim Wunderlich:
Optimized Selection of Frequencies for Faster-Than-at-Speed Test. ATS 2015: 109-114 - [c162]Michael A. Kochte, Atefe Dalirsani, Andrea Bernabei, Martin Omaña, Cecilia Metra, Hans-Joachim Wunderlich:
Intermittent and Transient Fault Diagnosis on Sparse Code Signatures. ATS 2015: 157-162 - [c161]Rafal Baranowski, Farshad Firouzi, Saman Kiamehr, Chang Liu, Mehdi Baradaran Tahoori, Hans-Joachim Wunderlich:
On-line prediction of NBTI-induced aging rates. DATE 2015: 589-592 - [c160]Eric Schneider, Stefan Holst, Michael A. Kochte, Xiaoqing Wen, Hans-Joachim Wunderlich:
GPU-accelerated small delay fault simulation. DATE 2015: 1174-1179 - [c159]Alexander Schöll, Claus Braun, Michael A. Kochte, Hans-Joachim Wunderlich:
Low-overhead fault-tolerance for the preconditioned conjugate gradient solver. DFTS 2015: 60-65 - [c158]Hans-Joachim Wunderlich:
Testing visions. ETS 2015: 1 - [c157]Hongyan Zhang, Michael A. Kochte, Eric Schneider, Lars Bauer, Hans-Joachim Wunderlich, Jörg Henkel:
STRAP: Stress-Aware Placement for Aging Mitigation in Runtime Reconfigurable Architectures. ICCAD 2015: 38-45 - [c156]Alexander Schöll, Claus Braun, Michael A. Kochte, Hans-Joachim Wunderlich:
Efficient on-line fault-tolerance for the preconditioned conjugate gradient method. IOLTS 2015: 95-100 - [c155]Chang Liu, Michael A. Kochte, Hans-Joachim Wunderlich:
Efficient observation point selection for aging monitoring. IOLTS 2015: 176-181 - [c154]Hans-Joachim Wunderlich, Martin Radetzki:
Multi-Layer Test and Diagnosis for Dependable NoCs. NOCS 2015: 5:1-5:8 - 2014
- [j40]D. A. Tran, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Hans-Joachim Wunderlich:
A New Hybrid Fault-Tolerant Architecture for Digital CMOS Circuits and Systems. J. Electron. Test. 30(4): 401-413 (2014) - [j39]Laura Rodríguez Gómez, Alejandro Cook, Thomas Indlekofer, Sybille Hellebrand, Hans-Joachim Wunderlich:
Adaptive Bayesian Diagnosis of Intermittent Faults. J. Electron. Test. 30(5): 527-540 (2014) - [j38]Rafal Baranowski, Michael A. Kochte, Hans-Joachim Wunderlich:
Access Port Protection for Reconfigurable Scan Networks. J. Electron. Test. 30(6): 711-723 (2014) - [j37]Sybille Hellebrand, Hans-Joachim Wunderlich:
SAT-based ATPG beyond stuck-at fault testing. it Inf. Technol. 56(4): 165-172 (2014) - [j36]Andreas Herkersdorf, Hananeh Aliee, Michael Engel, Michael Glaß, Christina Gimmler-Dumont, Jörg Henkel, Veit Kleeberger, Michael A. Kochte, Johannes Maximilian Kühn, Daniel Mueller-Gritschneder, Sani R. Nassif, Holm Rauchfuss, Wolfgang Rosenstiel, Ulf Schlichtmann, Muhammad Shafique, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Christian Weis, Hans-Joachim Wunderlich:
Resilience Articulation Point (RAP): Cross-layer dependability modeling for nanometer system-on-chip resilience. Microelectron. Reliab. 54(6-7): 1066-1074 (2014) - [j35]Dominik Erb, Michael A. Kochte, Matthias Sauer, Stefan Hillebrecht, Tobias Schubert, Hans-Joachim Wunderlich, Bernd Becker:
Exact Logic and Fault Simulation in Presence of Unknowns. ACM Trans. Design Autom. Electr. Syst. 19(3): 28:1-28:17 (2014) - [j34]Nadereh Hatami, Rafal Baranowski, Paolo Prinetto, Hans-Joachim Wunderlich:
Multilevel Simulation of Nonfunctional Properties by Piecewise Evaluation. ACM Trans. Design Autom. Electr. Syst. 19(4): 37:1-37:21 (2014) - [c153]Atefe Dalirsani, Nadereh Hatami, Michael E. Imhof, Marcus Eggenberger, Gert Schley, Martin Radetzki, Hans-Joachim Wunderlich:
On Covering Structural Defects in NoCs by Functional Tests. ATS 2014: 87-92 - [c152]Artur Jutman, Matteo Sonza Reorda, Hans-Joachim Wunderlich:
High Quality System Level Test and Diagnosis. ATS 2014: 298-305 - [c151]Alexander Schöll, Claus Braun, Markus Daub, Guido Schneider, Hans-Joachim Wunderlich:
Adaptive parallel simulation of a two-timescale model for apoptotic receptor-clustering on GPUs. BIBM 2014: 424-431 - [c150]Hongyan Zhang, Michael A. Kochte, Michael E. Imhof, Lars Bauer, Hans-Joachim Wunderlich, Jörg Henkel:
GUARD: GUAranteed Reliability in Dynamically Reconfigurable Systems. DAC 2014: 32:1-32:6 - [c149]Felix Reimann, Michael Glaß, Jürgen Teich, Alejandro Cook, Laura Rodríguez Gómez, Dominik Ull, Hans-Joachim Wunderlich, Piet Engelke, Ulrich Abelein:
Advanced Diagnosis: SBST and BIST Integration in Automotive E/E Architectures. DAC 2014: 96:1-96:9 - [c148]Ulrich Abelein, Alejandro Cook, Piet Engelke, Michael Glaß, Felix Reimann, Laura Rodríguez Gómez, Thomas Russ, Jürgen Teich, Dominik Ull, Hans-Joachim Wunderlich:
Non-intrusive integration of advanced diagnosis features in automotive E/E-architectures. DATE 2014: 1-6 - [c147]Michael E. Imhof, Hans-Joachim Wunderlich:
Bit-Flipping Scan - A unified architecture for fault tolerance and offline test. DATE 2014: 1-6 - [c146]Claus Braun, Sebastian Halder, Hans-Joachim Wunderlich:
A-ABFT: Autonomous Algorithm-Based Fault Tolerance for Matrix Multiplications on Graphics Processing Units. DSN 2014: 443-454 - [c145]Alejandro Cook, Hans-Joachim Wunderlich:
Diagnosis of multiple faults with highly compacted test responses. ETS 2014: 1-6 - [c144]Matthias Sauer, Ilia Polian, Michael E. Imhof, Abdullah Mumtaz, Eric Schneider, Alexander Czutro, Hans-Joachim Wunderlich, Bernd Becker:
Variation-aware deterministic ATPG. ETS 2014: 1-6 - [c143]Marcus Wagner, Hans-Joachim Wunderlich:
Incremental computation of delay fault detection probability for variation-aware test generation. ETS 2014: 1-6 - [c142]Eric Schneider, Stefan Holst, Xiaoqing Wen, Hans-Joachim Wunderlich:
Data-parallel simulation for fast and accurate timing validation of CMOS circuits. ICCAD 2014: 17-23 - [c141]Atefe Dalirsani, Michael A. Kochte, Hans-Joachim Wunderlich:
Area-efficient synthesis of fault-secure NoC switches. IOLTS 2014: 13-18 - [c140]Dominik Erb, Karsten Scheibler, Michael A. Kochte, Matthias Sauer, Hans-Joachim Wunderlich, Bernd Becker:
Test pattern generation in presence of unknown values based on restricted symbolic logic. ITC 2014: 1-10 - [c139]Sybille Hellebrand, Thomas Indlekofer, Matthias Kampmann, Michael A. Kochte, Chang Liu, Hans-Joachim Wunderlich:
FAST-BIST: Faster-than-at-Speed BIST targeting hidden delay defects. ITC 2014: 1-8 - [c138]Rafal Baranowski, Michael A. Kochte, Hans-Joachim Wunderlich:
Verifikation Rekonfigurierbarer Scan-Netze. MBMV 2014: 137-146 - [c137]Atefe Dalirsani, Michael E. Imhof, Hans-Joachim Wunderlich:
Structural Software-Based Self-Test of Network-on-Chip. VTS 2014: 1-6 - 2013
- [j33]Lars Bauer, Claus Braun, Michael E. Imhof, Michael A. Kochte, Eric Schneider, Hongyan Zhang, Jörg Henkel, Hans-Joachim Wunderlich:
Test Strategies for Reliable Runtime Reconfigurable Architectures. IEEE Trans. Computers 62(8): 1494-1507 (2013) - [c136]Dominik Erb, Michael A. Kochte, Matthias Sauer, Hans-Joachim Wunderlich, Bernd Becker:
Accurate Multi-cycle ATPG in Presence of X-Values. Asian Test Symposium 2013: 245-250 - [c135]Rafal Baranowski, Michael A. Kochte, Hans-Joachim Wunderlich:
Securing Access to Reconfigurable Scan Networks. Asian Test Symposium 2013: 295-300 - [c134]Marcus Wagner, Hans-Joachim Wunderlich:
Efficient variation-aware statistical dynamic timing analysis for delay test applications. DATE 2013: 276-281 - [c133]Stefan Hillebrecht, Michael A. Kochte, Dominik Erb, Hans-Joachim Wunderlich, Bernd Becker:
Accurate QBF-based test pattern generation in presence of unknown values. DATE 2013: 436-441 - [c132]Atefe Dalirsani, Michael A. Kochte, Hans-Joachim Wunderlich:
SAT-based code synthesis for fault-secure circuits. DFTS 2013: 39-44 - [c131]Rafal Baranowski, Alejandro Cook, Michael E. Imhof, Chang Liu, Hans-Joachim Wunderlich:
Synthesis of workload monitors for on-line stress prediction. DFTS 2013: 137-142 - [c130]Rafal Baranowski, Michael A. Kochte, Hans-Joachim Wunderlich:
Scan pattern retargeting and merging with reduced access time. ETS 2013: 1-7 - [c129]Hans-Joachim Wunderlich, Claus Braun, Sebastian Halder:
Efficacy and efficiency of algorithm-based fault-tolerance on GPUs. IOLTS 2013: 240-243 - [c128]Hongyan Zhang, Lars Bauer, Michael A. Kochte, Eric Schneider, Claus Braun, Michael E. Imhof, Hans-Joachim Wunderlich, Jörg Henkel:
Module diversification: Fault tolerance and aging mitigation for runtime reconfigurable architectures. ITC 2013: 1-10 - 2012
- [j32]Atefe Dalirsani, Stefan Holst, Melanie Elm, Hans-Joachim Wunderlich:
Structural Test and Diagnosis for Graceful Degradation of NoC Switches. J. Electron. Test. 28(6): 831-841 (2012) - [j31]Michael A. Kochte, Melanie Elm, Hans-Joachim Wunderlich:
Accurate X-Propagation for Test Applications by SAT-Based Reasoning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(12): 1908-1919 (2012) - [c127]Lars Bauer, Claus Braun, Michael E. Imhof, Michael A. Kochte, Hongyan Zhang, Hans-Joachim Wunderlich, Jörg Henkel:
OTERA: Online test strategies for reliable reconfigurable architectures - Invited paper for the AHS-2012 special session "Dependability by reconfigurable hardware". AHS 2012: 38-45 - [c126]Stefan Holst, Eric Schneider, Hans-Joachim Wunderlich:
Scan Test Power Simulation on GPGPUs. Asian Test Symposium 2012: 155-160 - [c125]