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"Simultaneous Clock Wire Sizing and Shield Insertion for Minimizing Routing ..."

Yoonsang Song et al. (2023)

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DOI: 10.1109/MLCAD58807.2023.10299861

access: closed

type: Conference or Workshop Paper

metadata version: 2023-11-15

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  dblp key:
  - conf/mlcad/SongCLS23
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  - https://dblp.org/rec/conf/mlcad/SongCLS23
Yoonsang Song, Gangmin Cho, Wonjae Lee, Youngsoo Shin:
Simultaneous Clock Wire Sizing and Shield Insertion for Minimizing Routing Blockage. MLCAD 2023: 1-6

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