"3D Logic Cells Design and Results Based on Vertical NWFET Technology ..."

Chhandak Mukherjee et al. (2020)

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DOI: 10.1109/VLSI-SOC46417.2020.9344094

access: closed

type: Conference or Workshop Paper

metadata version: 2023-09-30

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Chhandak Mukherjee, Marina Deng, François Marc, Cristell Maneux, Arnaud Poittevin, Ian O'Connor, Sébastien Le Beux, Cédric Marchand, Abhishek Kumar, Aurélie Lecestre, Guilhem Larrieu:
3D Logic Cells Design and Results Based on Vertical NWFET Technology Including Tied Compact Model. VLSI-SOC 2020: 76-81

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