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"Versa: A Dataflow-Centric Multiprocessor with 36 Systolic ARM Cortex-M4F ..."

Sung Kim et al. (2021)

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DOI: 10.23919/VLSICIRCUITS52068.2021.9492391

access: closed

type: Conference or Workshop Paper

metadata version: 2022-04-09

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  - conf/vlsic/KimFDCTPAXMCBDK21
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  - https://dblp.org/rec/conf/vlsic/KimFDCTPAXMCBDK21
Sung Kim, Morteza Fayazi, Alhad Daftardar, Kuan-Yu Chen, Jielun Tan, Subhankar Pal, Tutu Ajayi, Yan Xiong, Trevor N. Mudge, Chaitali Chakrabarti, David T. Blaauw, Ronald G. Dreslinski, Hun-Seok Kim:
Versa: A Dataflow-Centric Multiprocessor with 36 Systolic ARM Cortex-M4F Cores and a Reconfigurable Crossbar-Memory Hierarchy in 28nm. VLSI Circuits 2021: 1-2

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