"A 20Gb/s/pin Single-Ended PAM-4 Transceiver with Pre/Post-Channel ..."

Kyunghwan Min et al. (2024)

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DOI: 10.1109/VLSITECHNOLOGYANDCIR46783.2024.10631482

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type: Conference or Workshop Paper

metadata version: 2025-03-03

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Kyunghwan Min, Jahoon Jin, Soo-Min Lee, Sodam Ju, Jisu Yook, Jihoon Lee, Yunji Hong, Sungsik Park, Sang-Ho Kim, Jongwoo Lee, Hyungjong Ko:
A 20Gb/s/pin Single-Ended PAM-4 Transceiver with Pre/Post-Channel Switching Jitter Compensation and DQS-Driven Biasing for Low-Power Memory Interfaces. VLSI Technology and Circuits 2024: 1-2

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