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"A 0.87 V 12.5 Gb/s Clock-Path Feedback Equalization Receiver with Unfixed ..."

Daewoong Lee et al. (2019)

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DOI: 10.23919/VLSIC.2019.8777968

access: closed

type: Conference or Workshop Paper

metadata version: 2019-08-05

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Daewoong Lee, Dongil Lee, Yong-Hun Kim, Lee-Sup Kim:
A 0.87 V 12.5 Gb/s Clock-Path Feedback Equalization Receiver with Unfixed Tap Weighting Property in 65 nm CMOS. VLSI Circuits 2019: 196-

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