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"A standard cell phase locked loop design, analysis and high-level ..."

Yalçin Balcioglu, Günhan Dündar (2017)

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DOI: 10.1016/J.VLSI.2017.04.001

access: closed

type: Journal Article

metadata version: 2021-05-24

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Yalçin Balcioglu, Günhan Dündar:
A standard cell phase locked loop design, analysis and high-level synthesis tool (CellPLL). Integr. 58: 142-154 (2017)

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