"Array Multipliers for High Throughput in Xilinx FPGAs with 6-Input LUTs."

E. George Walters III (2016)

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DOI: 10.3390/COMPUTERS5040020

access: open

type: Journal Article

metadata version: 2020-06-21

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E. George Walters III:
Array Multipliers for High Throughput in Xilinx FPGAs with 6-Input LUTs. Comput. 5(4): 20 (2016)

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