"Fast and accurate circuit delay model for FPGA architectural exploration."

Qiang Liu, HanJing Qian (2017)

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DOI: 10.1049/IET-CDT.2016.0053

access: closed

type: Journal Article

metadata version: 2020-07-14

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Qiang Liu, HanJing Qian:
Fast and accurate circuit delay model for FPGA architectural exploration. IET Comput. Digit. Tech. 11(3): 117-123 (2017)

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