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"Concepts for run-time and error-resilient control flow checking of ..."
Daniel Ziener, Jürgen Teich (2009)
- Daniel Ziener, Jürgen Teich:
Concepts for run-time and error-resilient control flow checking of embedded RISC CPUs. Int. J. Auton. Adapt. Commun. Syst. 2(3): 256-275 (2009)
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