"An algorithmic approach to construct the library of universal logic gates ..."

Aadarsh Ganesh Goenka et al. (2025)

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DOI: 10.1016/J.VLSI.2025.102514

access: closed

type: Journal Article

metadata version: 2025-10-14

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Aadarsh Ganesh Goenka, Shyamali Mitra, KC Santosh, Mrinal K. Naskar, Nibaran Das:
An algorithmic approach to construct the library of universal logic gates beyond NAND and NOR. Integr. 105: 102514 (2025)

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