default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDIntegration, Volume 105
Volume 105, 2025
- Ahmed Alotaibi
, Mohammed Benaissa:
A parametric, scalable and efficient architecture for schoolbook polynomial multiplier for lattice-based cryptography. 102479 - Yunhui Deng, Chuanpei Xu:
Path planning algorithm for data acquisition system based on 3D network-on-chip. 102484 - Nanlin Guo, Jun Tao, Xuan Zeng, Xin Li:
Robust analog/RF circuit design via Cycle-Consistent Generative Adversarial Networks. 102488 - Jiahao Xiong, Xiao Zhao, Bojiang Zhang, Yicheng Peng:
A fast transient response capless low-dropout regulator with NMOS-FVF structure. 102481 - Lihua An, Pingqiang Zhou:
A thermal-aware layer-wise quantization framework for ReRAM-Based DNN CIM systems. 102485 - Trio Adiono, Michael Jonathan, Erwin Setiawan, Syifaul Fuada, Nana Sutisna, Rahmat Mulyawan, Infall Syafalni:
Design and implementation of a real-time SDR-FPGA-based versatile radio frequency OFDM system. 102486 - Kusuma Neerugatti, Venugopal Pakala:
Design of 2.54 GHz active inductor-based LC-voltage controlled oscillator for bluetooth/WLAN applications. 102487 - Karim Soliman, Chunfeng Li, Feng Shi:
Semi-adaptive distributed approach for triplet-based architecture inter-core communication Network-on-Chip. 102489 - Ke Meng, Yinghong Cao, Xianying Xu, Jun Mou:
Heterogeneous neural network based on locally active memristor with multiple firing patterns. 102490 - Sujeet Kumar, Kailash Chandra Ray:
A Parity-based Multi-bit Fault-Tolerant Instruction Decoder for RISC-V pipelined soft processor. 102498 - Jani Babu Shaik, Sonal Singhal, Nilesh Goel, Atul Ranjan Srivastava, Siona Menezes Picardo:
rel-SLIFMEM: Design and analysis of a reliability-aware neuromorphic system. 102499 - Zhenyao Li, Jie Jin, Daobing Zhang, Chaoyang Chen:
An attractor-controllable memristive Hopfield neural network and its application on voice encryption. 102500 - Kella Chaitanya, Pulkit Singh, Zeesha Mishra, Bibhudendra Acharya:
Area-efficient architectures of Midori lightweight block cipher for resource constrained devices. 102501 - Yufeng Li, Yiwei Ci, Qiusong Yang, Enyuan Tian:
Efficient processor verification by tautologies-derived universal properties model checking. 102502 - Mingzhen Li, Xisheng Zhang, Guoyong Shi:
Op-Amp sizing via behavioral constraint generation and Gm/ID sampling. 102503 - Kotadai Zourmba, Beining Fu, Kehui Sun:
Dynamics and circuit implementation of a novel coupled discrete memristive system. 102504 - M. G. Abbas Malik, Muhammad Hussain, Zia Bashir:
Efficient lattice-based Mordell elliptic curve S-box for secure lightweight cryptography. 102505 - Yue Xiang, Zhen Wang:
WF-SPR: A weighted single fanout approach for signal probability-based reliability estimation. 102507 - Oumayma Bel Haj Salah, Seifeddine Messaoud, Mohamed Ali Hajjaji, Mohamed Atri, Noureddine Liouane:
Post-training quantization for efficient FPGA-based neural network acceleration. 102508 - Yuntao Liu, Yuyang Zhang, Shuo Fang, Lijing Wang, Rui Ge:
A 158 nw, 2.877 ppm/°C resistorless bandgap reference circuit. 102509 - Manoj Kumar, Shireesh Kumar Rai, Bhawna Aggarwal, Maneesha Gupta:
Design of a new compact multiplier-less memtranstor emulator and its application in neuromorphic and chaos generation. 102511 - Hui Xu, Yong Xue, Yu Zhang, Xia Sun, Jiale Li, Ruijun Ma, Huaguo Liang, Zhengfeng Huang:
ESegNet-ILT: An end-to-end mask optimization method in VLSI design flow based on enhanced SegNet. 102512 - Esra Celik, Deniz Dal:
A systematic review of machine learning-driven design space exploration in high-level synthesis. 102513 - Aadarsh Ganesh Goenka, Shyamali Mitra, KC Santosh, Mrinal K. Naskar, Nibaran Das:
An algorithmic approach to construct the library of universal logic gates beyond NAND and NOR. 102514 - Sandra M. Djosic, Milica D. Jovanovic, Goran Lj. Djordjevic:
FPGA-based pipelined kNN accelerator with early termination optimization. 102515 - Razieh Ghasemi, Mohammad Azim Karami:
Implementation of two new 10-bit 1 GS/s hybrid DACs with a novel gain error calibration technique. 102516 - Jen-Chieh Liu, Jun-Yu Chen, Wenqi Liu:
A programmable delay chain for the source-synchronous interface. 102517 - Kushal Kumar, Akshay Rana, Shireesh Kumar Rai, Bhawna Aggarwal:
Design and analysis of VDIBA-based chaotic oscillators and their applications in communication system. 102518 - Teena Soni, Anil Kumar, Ila Sharma, Manoj Kumar Panda:
Hardware efficient design and implementation of multiplierless FIR filters using Sparse PSO on FPGA and ASIC. 102519 - Sidharth Kashyap, Pushpa Giri, Ashish Kumar Bhandari:
Resource-efficient hardware architecture for low-light image enhancement. 102521 - Prateek Goyal, Sujit Kumar Sahoo:
Low-power hardware architecture of optimized logarithmic square rooter with enhanced error compensation for error-tolerant systems. 102522 - Israel Corbacho, Pietro Monsurrò, Francisco Romero-Galán, Miguel Angel Domínguez, Alessandro Trifiletti, Juan M. Carrillo:
Low-Gm tunable CMOS transconductors for simultaneous multi-sine bioimpedance spectroscopy. 102523 - Shutong Zhang, Pengjun Wang, Mengfan Xv, Bo Chen, Yuejun Zhang:
ATSS-PUF with hardware sharing for secure in-situ memory circuit. 102524 - Shunqin Cai, Liukai Xu, Wentao Liu, Dengfeng Wang, Keqing Ouyang, Jinyu Wang, Weizhong Wu, Qiang Huang, Zhi Li, Yanan Sun:
Hop-CIM: An all-digital two-level approximate SRAM-CIM macro for high energy-efficient HNN acceleration with data-aware early exit and column-wise partial-sum reuse. 102525 - Ahmad Mouri Zadeh Khaki, Ahyoung Choi:
A real-time integrated eye tracker with in-pixel image processing in 0.18-μm CMOS technology. 102526 - Tao Wu, Baoxiang Du, Zhijun Chai:
Improved Shimizu-Morioka system and its application in image encryption. 102527 - Predrag Petrovic, Vladica Mijailovic:
Incremental/decremental memristor utilizing solely a voltage controlled second-generation current conveyor. 102528 - Yuan Zhang, Zewei Jing, Qinghai Yang, Nan Cheng, Huaxi Gu, Kyung Sup Kwak:
A survey on vertical interconnection and topology of three-dimensional network-on-chip. 102529 - Tingyuan Nie, Yang Du, Da Guo, Kun Zhao:
FPGA routing congestion prediction combining DAGNN and GCN. 102530 - Aditya Soni, Sagar Juneja, M. Elangovan, Kulbhushan Sharma:
Design of a SRAM memory cell with enhanced stability and variability for embedded biomedical applications. 102537
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2025-12-09 23:25 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
